tests: virtio-9p: rename PCI configuration test
[qemu.git] / target / moxie / cpu.h
1 /*
2 * Moxie emulation
3 *
4 * Copyright (c) 2008, 2010, 2013 Anthony Green
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #ifndef MOXIE_CPU_H
21 #define MOXIE_CPU_H
22
23 #include "qemu-common.h"
24
25 #define TARGET_LONG_BITS 32
26
27 #define CPUArchState struct CPUMoxieState
28
29 #define MOXIE_EX_DIV0 0
30 #define MOXIE_EX_BAD 1
31 #define MOXIE_EX_IRQ 2
32 #define MOXIE_EX_SWI 3
33 #define MOXIE_EX_MMU_MISS 4
34 #define MOXIE_EX_BREAK 16
35
36 #include "exec/cpu-defs.h"
37 #include "fpu/softfloat.h"
38
39 #define TARGET_PAGE_BITS 12 /* 4k */
40
41 #define TARGET_PHYS_ADDR_SPACE_BITS 32
42 #define TARGET_VIRT_ADDR_SPACE_BITS 32
43
44 #define NB_MMU_MODES 1
45
46 typedef struct CPUMoxieState {
47
48 uint32_t flags; /* general execution flags */
49 uint32_t gregs[16]; /* general registers */
50 uint32_t sregs[256]; /* special registers */
51 uint32_t pc; /* program counter */
52 /* Instead of saving the cc value, we save the cmp arguments
53 and compute cc on demand. */
54 uint32_t cc_a; /* reg a for condition code calculation */
55 uint32_t cc_b; /* reg b for condition code calculation */
56
57 void *irq[8];
58
59 CPU_COMMON
60
61 } CPUMoxieState;
62
63 #include "qom/cpu.h"
64
65 #define TYPE_MOXIE_CPU "moxie-cpu"
66
67 #define MOXIE_CPU_CLASS(klass) \
68 OBJECT_CLASS_CHECK(MoxieCPUClass, (klass), TYPE_MOXIE_CPU)
69 #define MOXIE_CPU(obj) \
70 OBJECT_CHECK(MoxieCPU, (obj), TYPE_MOXIE_CPU)
71 #define MOXIE_CPU_GET_CLASS(obj) \
72 OBJECT_GET_CLASS(MoxieCPUClass, (obj), TYPE_MOXIE_CPU)
73
74 /**
75 * MoxieCPUClass:
76 * @parent_reset: The parent class' reset handler.
77 *
78 * A Moxie CPU model.
79 */
80 typedef struct MoxieCPUClass {
81 /*< private >*/
82 CPUClass parent_class;
83 /*< public >*/
84
85 DeviceRealize parent_realize;
86 void (*parent_reset)(CPUState *cpu);
87 } MoxieCPUClass;
88
89 /**
90 * MoxieCPU:
91 * @env: #CPUMoxieState
92 *
93 * A Moxie CPU.
94 */
95 typedef struct MoxieCPU {
96 /*< private >*/
97 CPUState parent_obj;
98 /*< public >*/
99
100 CPUMoxieState env;
101 } MoxieCPU;
102
103 static inline MoxieCPU *moxie_env_get_cpu(CPUMoxieState *env)
104 {
105 return container_of(env, MoxieCPU, env);
106 }
107
108 #define ENV_GET_CPU(e) CPU(moxie_env_get_cpu(e))
109
110 #define ENV_OFFSET offsetof(MoxieCPU, env)
111
112 MoxieCPU *cpu_moxie_init(const char *cpu_model);
113 void moxie_cpu_do_interrupt(CPUState *cs);
114 void moxie_cpu_dump_state(CPUState *cpu, FILE *f,
115 fprintf_function cpu_fprintf, int flags);
116 hwaddr moxie_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
117 void moxie_translate_init(void);
118 int cpu_moxie_signal_handler(int host_signum, void *pinfo,
119 void *puc);
120
121 #define cpu_init(cpu_model) CPU(cpu_moxie_init(cpu_model))
122
123 #define cpu_signal_handler cpu_moxie_signal_handler
124
125 static inline int cpu_mmu_index(CPUMoxieState *env, bool ifetch)
126 {
127 return 0;
128 }
129
130 #include "exec/cpu-all.h"
131
132 static inline void cpu_get_tb_cpu_state(CPUMoxieState *env, target_ulong *pc,
133 target_ulong *cs_base, uint32_t *flags)
134 {
135 *pc = env->pc;
136 *cs_base = 0;
137 *flags = 0;
138 }
139
140 int moxie_cpu_handle_mmu_fault(CPUState *cpu, vaddr address,
141 int rw, int mmu_idx);
142
143 #endif /* MOXIE_CPU_H */