meson: target
[qemu.git] / target / moxie / cpu.h
1 /*
2 * Moxie emulation
3 *
4 * Copyright (c) 2008, 2010, 2013 Anthony Green
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #ifndef MOXIE_CPU_H
21 #define MOXIE_CPU_H
22
23 #include "exec/cpu-defs.h"
24
25 #define MOXIE_EX_DIV0 0
26 #define MOXIE_EX_BAD 1
27 #define MOXIE_EX_IRQ 2
28 #define MOXIE_EX_SWI 3
29 #define MOXIE_EX_MMU_MISS 4
30 #define MOXIE_EX_BREAK 16
31
32 typedef struct CPUMoxieState {
33
34 uint32_t flags; /* general execution flags */
35 uint32_t gregs[16]; /* general registers */
36 uint32_t sregs[256]; /* special registers */
37 uint32_t pc; /* program counter */
38 /* Instead of saving the cc value, we save the cmp arguments
39 and compute cc on demand. */
40 uint32_t cc_a; /* reg a for condition code calculation */
41 uint32_t cc_b; /* reg b for condition code calculation */
42
43 void *irq[8];
44
45 /* Fields up to this point are cleared by a CPU reset */
46 struct {} end_reset_fields;
47 } CPUMoxieState;
48
49 #include "hw/core/cpu.h"
50
51 #define TYPE_MOXIE_CPU "moxie-cpu"
52
53 #define MOXIE_CPU_CLASS(klass) \
54 OBJECT_CLASS_CHECK(MoxieCPUClass, (klass), TYPE_MOXIE_CPU)
55 #define MOXIE_CPU(obj) \
56 OBJECT_CHECK(MoxieCPU, (obj), TYPE_MOXIE_CPU)
57 #define MOXIE_CPU_GET_CLASS(obj) \
58 OBJECT_GET_CLASS(MoxieCPUClass, (obj), TYPE_MOXIE_CPU)
59
60 /**
61 * MoxieCPUClass:
62 * @parent_reset: The parent class' reset handler.
63 *
64 * A Moxie CPU model.
65 */
66 typedef struct MoxieCPUClass {
67 /*< private >*/
68 CPUClass parent_class;
69 /*< public >*/
70
71 DeviceRealize parent_realize;
72 DeviceReset parent_reset;
73 } MoxieCPUClass;
74
75 /**
76 * MoxieCPU:
77 * @env: #CPUMoxieState
78 *
79 * A Moxie CPU.
80 */
81 typedef struct MoxieCPU {
82 /*< private >*/
83 CPUState parent_obj;
84 /*< public >*/
85
86 CPUNegativeOffsetState neg;
87 CPUMoxieState env;
88 } MoxieCPU;
89
90
91 void moxie_cpu_do_interrupt(CPUState *cs);
92 void moxie_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
93 hwaddr moxie_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
94 void moxie_translate_init(void);
95 int cpu_moxie_signal_handler(int host_signum, void *pinfo,
96 void *puc);
97
98 #define MOXIE_CPU_TYPE_SUFFIX "-" TYPE_MOXIE_CPU
99 #define MOXIE_CPU_TYPE_NAME(model) model MOXIE_CPU_TYPE_SUFFIX
100 #define CPU_RESOLVING_TYPE TYPE_MOXIE_CPU
101
102 #define cpu_signal_handler cpu_moxie_signal_handler
103
104 static inline int cpu_mmu_index(CPUMoxieState *env, bool ifetch)
105 {
106 return 0;
107 }
108
109 typedef CPUMoxieState CPUArchState;
110 typedef MoxieCPU ArchCPU;
111
112 #include "exec/cpu-all.h"
113
114 static inline void cpu_get_tb_cpu_state(CPUMoxieState *env, target_ulong *pc,
115 target_ulong *cs_base, uint32_t *flags)
116 {
117 *pc = env->pc;
118 *cs_base = 0;
119 *flags = 0;
120 }
121
122 bool moxie_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
123 MMUAccessType access_type, int mmu_idx,
124 bool probe, uintptr_t retaddr);
125
126 #endif /* MOXIE_CPU_H */