meson: convert hw/arch*
[qemu.git] / target / riscv / Makefile.objs
1 obj-y += translate.o op_helper.o cpu_helper.o cpu.o csr.o fpu_helper.o vector_helper.o gdbstub.o
2 obj-$(CONFIG_SOFTMMU) += pmp.o
3
4 ifeq ($(CONFIG_SOFTMMU),y)
5 obj-y += monitor.o
6 endif
7
8 DECODETREE = $(SRC_PATH)/scripts/decodetree.py
9
10 decode32-y = $(SRC_PATH)/target/riscv/insn32.decode
11 decode32-$(TARGET_RISCV64) += $(SRC_PATH)/target/riscv/insn32-64.decode
12
13 decode16-y = $(SRC_PATH)/target/riscv/insn16.decode
14 decode16-$(TARGET_RISCV32) += $(SRC_PATH)/target/riscv/insn16-32.decode
15 decode16-$(TARGET_RISCV64) += $(SRC_PATH)/target/riscv/insn16-64.decode
16
17 target/riscv/decode_insn32.c.inc: $(decode32-y) $(DECODETREE)
18         $(call quiet-command, \
19           $(PYTHON) $(DECODETREE) -o $@ --static-decode decode_insn32 \
20           $(decode32-y), "GEN", $(TARGET_DIR)$@)
21
22 target/riscv/decode_insn16.c.inc: $(decode16-y) $(DECODETREE)
23         $(call quiet-command, \
24           $(PYTHON) $(DECODETREE) -o $@ --static-decode decode_insn16 \
25           --insnwidth 16 $(decode16-y), "GEN", $(TARGET_DIR)$@)
26
27 target/riscv/translate.o: target/riscv/decode_insn32.c.inc \
28         target/riscv/decode_insn16.c.inc