migration: increase max-bandwidth to 128 MiB/s (1 Gib/s)
[qemu.git] / target / sh4 / gdbstub.c
1 /*
2 * SuperH gdb server stub
3 *
4 * Copyright (c) 2003-2005 Fabrice Bellard
5 * Copyright (c) 2013 SUSE LINUX Products GmbH
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 */
20 #include "qemu/osdep.h"
21 #include "cpu.h"
22 #include "exec/gdbstub.h"
23
24 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
25 /* FIXME: We should use XML for this. */
26
27 int superh_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
28 {
29 SuperHCPU *cpu = SUPERH_CPU(cs);
30 CPUSH4State *env = &cpu->env;
31
32 switch (n) {
33 case 0 ... 7:
34 if ((env->sr & (1u << SR_MD)) && (env->sr & (1u << SR_RB))) {
35 return gdb_get_regl(mem_buf, env->gregs[n + 16]);
36 } else {
37 return gdb_get_regl(mem_buf, env->gregs[n]);
38 }
39 case 8 ... 15:
40 return gdb_get_regl(mem_buf, env->gregs[n]);
41 case 16:
42 return gdb_get_regl(mem_buf, env->pc);
43 case 17:
44 return gdb_get_regl(mem_buf, env->pr);
45 case 18:
46 return gdb_get_regl(mem_buf, env->gbr);
47 case 19:
48 return gdb_get_regl(mem_buf, env->vbr);
49 case 20:
50 return gdb_get_regl(mem_buf, env->mach);
51 case 21:
52 return gdb_get_regl(mem_buf, env->macl);
53 case 22:
54 return gdb_get_regl(mem_buf, cpu_read_sr(env));
55 case 23:
56 return gdb_get_regl(mem_buf, env->fpul);
57 case 24:
58 return gdb_get_regl(mem_buf, env->fpscr);
59 case 25 ... 40:
60 if (env->fpscr & FPSCR_FR) {
61 return gdb_get_float32(mem_buf, env->fregs[n - 9]);
62 }
63 return gdb_get_float32(mem_buf, env->fregs[n - 25]);
64 case 41:
65 return gdb_get_regl(mem_buf, env->ssr);
66 case 42:
67 return gdb_get_regl(mem_buf, env->spc);
68 case 43 ... 50:
69 return gdb_get_regl(mem_buf, env->gregs[n - 43]);
70 case 51 ... 58:
71 return gdb_get_regl(mem_buf, env->gregs[n - (51 - 16)]);
72 }
73
74 return 0;
75 }
76
77 int superh_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
78 {
79 SuperHCPU *cpu = SUPERH_CPU(cs);
80 CPUSH4State *env = &cpu->env;
81
82 switch (n) {
83 case 0 ... 7:
84 if ((env->sr & (1u << SR_MD)) && (env->sr & (1u << SR_RB))) {
85 env->gregs[n + 16] = ldl_p(mem_buf);
86 } else {
87 env->gregs[n] = ldl_p(mem_buf);
88 }
89 break;
90 case 8 ... 15:
91 env->gregs[n] = ldl_p(mem_buf);
92 break;
93 case 16:
94 env->pc = ldl_p(mem_buf);
95 break;
96 case 17:
97 env->pr = ldl_p(mem_buf);
98 break;
99 case 18:
100 env->gbr = ldl_p(mem_buf);
101 break;
102 case 19:
103 env->vbr = ldl_p(mem_buf);
104 break;
105 case 20:
106 env->mach = ldl_p(mem_buf);
107 break;
108 case 21:
109 env->macl = ldl_p(mem_buf);
110 break;
111 case 22:
112 cpu_write_sr(env, ldl_p(mem_buf));
113 break;
114 case 23:
115 env->fpul = ldl_p(mem_buf);
116 break;
117 case 24:
118 env->fpscr = ldl_p(mem_buf);
119 break;
120 case 25 ... 40:
121 if (env->fpscr & FPSCR_FR) {
122 env->fregs[n - 9] = ldfl_p(mem_buf);
123 } else {
124 env->fregs[n - 25] = ldfl_p(mem_buf);
125 }
126 break;
127 case 41:
128 env->ssr = ldl_p(mem_buf);
129 break;
130 case 42:
131 env->spc = ldl_p(mem_buf);
132 break;
133 case 43 ... 50:
134 env->gregs[n - 43] = ldl_p(mem_buf);
135 break;
136 case 51 ... 58:
137 env->gregs[n - (51 - 16)] = ldl_p(mem_buf);
138 break;
139 default:
140 return 0;
141 }
142
143 return 4;
144 }