hw/arm/virt: Merge VirtBoardInfo and VirtMachineState
[qemu.git] / target / unicore32 / cpu.c
1 /*
2 * QEMU UniCore32 CPU
3 *
4 * Copyright (c) 2010-2012 Guan Xuetao
5 * Copyright (c) 2012 SUSE LINUX Products GmbH
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * Contributions from 2012-04-01 on are considered under GPL version 2,
12 * or (at your option) any later version.
13 */
14
15 #include "qemu/osdep.h"
16 #include "qapi/error.h"
17 #include "cpu.h"
18 #include "qemu-common.h"
19 #include "migration/vmstate.h"
20 #include "exec/exec-all.h"
21
22 static void uc32_cpu_set_pc(CPUState *cs, vaddr value)
23 {
24 UniCore32CPU *cpu = UNICORE32_CPU(cs);
25
26 cpu->env.regs[31] = value;
27 }
28
29 static bool uc32_cpu_has_work(CPUState *cs)
30 {
31 return cs->interrupt_request &
32 (CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB);
33 }
34
35 static inline void set_feature(CPUUniCore32State *env, int feature)
36 {
37 env->features |= feature;
38 }
39
40 /* CPU models */
41
42 static ObjectClass *uc32_cpu_class_by_name(const char *cpu_model)
43 {
44 ObjectClass *oc;
45 char *typename;
46
47 if (cpu_model == NULL) {
48 return NULL;
49 }
50
51 typename = g_strdup_printf("%s-" TYPE_UNICORE32_CPU, cpu_model);
52 oc = object_class_by_name(typename);
53 g_free(typename);
54 if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_UNICORE32_CPU) ||
55 object_class_is_abstract(oc))) {
56 oc = NULL;
57 }
58 return oc;
59 }
60
61 typedef struct UniCore32CPUInfo {
62 const char *name;
63 void (*instance_init)(Object *obj);
64 } UniCore32CPUInfo;
65
66 static void unicore_ii_cpu_initfn(Object *obj)
67 {
68 UniCore32CPU *cpu = UNICORE32_CPU(obj);
69 CPUUniCore32State *env = &cpu->env;
70
71 env->cp0.c0_cpuid = 0x4d000863;
72 env->cp0.c0_cachetype = 0x0d152152;
73 env->cp0.c1_sys = 0x2000;
74 env->cp0.c2_base = 0x0;
75 env->cp0.c3_faultstatus = 0x0;
76 env->cp0.c4_faultaddr = 0x0;
77 env->ucf64.xregs[UC32_UCF64_FPSCR] = 0;
78
79 set_feature(env, UC32_HWCAP_CMOV);
80 set_feature(env, UC32_HWCAP_UCF64);
81 set_snan_bit_is_one(1, &env->ucf64.fp_status);
82 }
83
84 static void uc32_any_cpu_initfn(Object *obj)
85 {
86 UniCore32CPU *cpu = UNICORE32_CPU(obj);
87 CPUUniCore32State *env = &cpu->env;
88
89 env->cp0.c0_cpuid = 0xffffffff;
90 env->ucf64.xregs[UC32_UCF64_FPSCR] = 0;
91
92 set_feature(env, UC32_HWCAP_CMOV);
93 set_feature(env, UC32_HWCAP_UCF64);
94 set_snan_bit_is_one(1, &env->ucf64.fp_status);
95 }
96
97 static const UniCore32CPUInfo uc32_cpus[] = {
98 { .name = "UniCore-II", .instance_init = unicore_ii_cpu_initfn },
99 { .name = "any", .instance_init = uc32_any_cpu_initfn },
100 };
101
102 static void uc32_cpu_realizefn(DeviceState *dev, Error **errp)
103 {
104 CPUState *cs = CPU(dev);
105 UniCore32CPUClass *ucc = UNICORE32_CPU_GET_CLASS(dev);
106 Error *local_err = NULL;
107
108 cpu_exec_realizefn(cs, &local_err);
109 if (local_err != NULL) {
110 error_propagate(errp, local_err);
111 return;
112 }
113
114 qemu_init_vcpu(cs);
115
116 ucc->parent_realize(dev, errp);
117 }
118
119 static void uc32_cpu_initfn(Object *obj)
120 {
121 CPUState *cs = CPU(obj);
122 UniCore32CPU *cpu = UNICORE32_CPU(obj);
123 CPUUniCore32State *env = &cpu->env;
124 static bool inited;
125
126 cs->env_ptr = env;
127
128 #ifdef CONFIG_USER_ONLY
129 env->uncached_asr = ASR_MODE_USER;
130 env->regs[31] = 0;
131 #else
132 env->uncached_asr = ASR_MODE_PRIV;
133 env->regs[31] = 0x03000000;
134 #endif
135
136 tlb_flush(cs, 1);
137
138 if (tcg_enabled() && !inited) {
139 inited = true;
140 uc32_translate_init();
141 }
142 }
143
144 static const VMStateDescription vmstate_uc32_cpu = {
145 .name = "cpu",
146 .unmigratable = 1,
147 };
148
149 static void uc32_cpu_class_init(ObjectClass *oc, void *data)
150 {
151 DeviceClass *dc = DEVICE_CLASS(oc);
152 CPUClass *cc = CPU_CLASS(oc);
153 UniCore32CPUClass *ucc = UNICORE32_CPU_CLASS(oc);
154
155 ucc->parent_realize = dc->realize;
156 dc->realize = uc32_cpu_realizefn;
157
158 cc->class_by_name = uc32_cpu_class_by_name;
159 cc->has_work = uc32_cpu_has_work;
160 cc->do_interrupt = uc32_cpu_do_interrupt;
161 cc->cpu_exec_interrupt = uc32_cpu_exec_interrupt;
162 cc->dump_state = uc32_cpu_dump_state;
163 cc->set_pc = uc32_cpu_set_pc;
164 #ifdef CONFIG_USER_ONLY
165 cc->handle_mmu_fault = uc32_cpu_handle_mmu_fault;
166 #else
167 cc->get_phys_page_debug = uc32_cpu_get_phys_page_debug;
168 #endif
169 dc->vmsd = &vmstate_uc32_cpu;
170 }
171
172 static void uc32_register_cpu_type(const UniCore32CPUInfo *info)
173 {
174 TypeInfo type_info = {
175 .parent = TYPE_UNICORE32_CPU,
176 .instance_init = info->instance_init,
177 };
178
179 type_info.name = g_strdup_printf("%s-" TYPE_UNICORE32_CPU, info->name);
180 type_register(&type_info);
181 g_free((void *)type_info.name);
182 }
183
184 static const TypeInfo uc32_cpu_type_info = {
185 .name = TYPE_UNICORE32_CPU,
186 .parent = TYPE_CPU,
187 .instance_size = sizeof(UniCore32CPU),
188 .instance_init = uc32_cpu_initfn,
189 .abstract = true,
190 .class_size = sizeof(UniCore32CPUClass),
191 .class_init = uc32_cpu_class_init,
192 };
193
194 static void uc32_cpu_register_types(void)
195 {
196 int i;
197
198 type_register_static(&uc32_cpu_type_info);
199 for (i = 0; i < ARRAY_SIZE(uc32_cpus); i++) {
200 uc32_register_cpu_type(&uc32_cpus[i]);
201 }
202 }
203
204 type_init(uc32_cpu_register_types)