trap signals for "-serial mon:stdio"
[qemu.git] / tests / fdc-test.c
1 /*
2 * Floppy test cases.
3 *
4 * Copyright (c) 2012 Kevin Wolf <kwolf@redhat.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #include <stdint.h>
26 #include <string.h>
27 #include <stdio.h>
28
29 #include <glib.h>
30
31 #include "libqtest.h"
32 #include "qemu-common.h"
33
34 #define TEST_IMAGE_SIZE 1440 * 1024
35
36 #define FLOPPY_BASE 0x3f0
37 #define FLOPPY_IRQ 6
38
39 enum {
40 reg_sra = 0x0,
41 reg_srb = 0x1,
42 reg_dor = 0x2,
43 reg_msr = 0x4,
44 reg_dsr = 0x4,
45 reg_fifo = 0x5,
46 reg_dir = 0x7,
47 };
48
49 enum {
50 CMD_SENSE_INT = 0x08,
51 CMD_READ_ID = 0x0a,
52 CMD_SEEK = 0x0f,
53 CMD_VERIFY = 0x16,
54 CMD_READ = 0xe6,
55 CMD_RELATIVE_SEEK_OUT = 0x8f,
56 CMD_RELATIVE_SEEK_IN = 0xcf,
57 };
58
59 enum {
60 BUSY = 0x10,
61 NONDMA = 0x20,
62 RQM = 0x80,
63 DIO = 0x40,
64
65 DSKCHG = 0x80,
66 };
67
68 char test_image[] = "/tmp/qtest.XXXXXX";
69
70 #define assert_bit_set(data, mask) g_assert_cmphex((data) & (mask), ==, (mask))
71 #define assert_bit_clear(data, mask) g_assert_cmphex((data) & (mask), ==, 0)
72
73 static uint8_t base = 0x70;
74
75 enum {
76 CMOS_FLOPPY = 0x10,
77 };
78
79 static void floppy_send(uint8_t byte)
80 {
81 uint8_t msr;
82
83 msr = inb(FLOPPY_BASE + reg_msr);
84 assert_bit_set(msr, RQM);
85 assert_bit_clear(msr, DIO);
86
87 outb(FLOPPY_BASE + reg_fifo, byte);
88 }
89
90 static uint8_t floppy_recv(void)
91 {
92 uint8_t msr;
93
94 msr = inb(FLOPPY_BASE + reg_msr);
95 assert_bit_set(msr, RQM | DIO);
96
97 return inb(FLOPPY_BASE + reg_fifo);
98 }
99
100 /* pcn: Present Cylinder Number */
101 static void ack_irq(uint8_t *pcn)
102 {
103 uint8_t ret;
104
105 g_assert(get_irq(FLOPPY_IRQ));
106 floppy_send(CMD_SENSE_INT);
107 floppy_recv();
108
109 ret = floppy_recv();
110 if (pcn != NULL) {
111 *pcn = ret;
112 }
113
114 g_assert(!get_irq(FLOPPY_IRQ));
115 }
116
117 static uint8_t send_read_command(uint8_t cmd)
118 {
119 uint8_t drive = 0;
120 uint8_t head = 0;
121 uint8_t cyl = 0;
122 uint8_t sect_addr = 1;
123 uint8_t sect_size = 2;
124 uint8_t eot = 1;
125 uint8_t gap = 0x1b;
126 uint8_t gpl = 0xff;
127
128 uint8_t msr = 0;
129 uint8_t st0;
130
131 uint8_t ret = 0;
132
133 floppy_send(cmd);
134 floppy_send(head << 2 | drive);
135 g_assert(!get_irq(FLOPPY_IRQ));
136 floppy_send(cyl);
137 floppy_send(head);
138 floppy_send(sect_addr);
139 floppy_send(sect_size);
140 floppy_send(eot);
141 floppy_send(gap);
142 floppy_send(gpl);
143
144 uint8_t i = 0;
145 uint8_t n = 2;
146 for (; i < n; i++) {
147 msr = inb(FLOPPY_BASE + reg_msr);
148 if (msr == 0xd0) {
149 break;
150 }
151 sleep(1);
152 }
153
154 if (i >= n) {
155 return 1;
156 }
157
158 st0 = floppy_recv();
159 if (st0 != 0x40) {
160 ret = 1;
161 }
162
163 floppy_recv();
164 floppy_recv();
165 floppy_recv();
166 floppy_recv();
167 floppy_recv();
168 floppy_recv();
169
170 return ret;
171 }
172
173 static uint8_t send_read_no_dma_command(int nb_sect, uint8_t expected_st0)
174 {
175 uint8_t drive = 0;
176 uint8_t head = 0;
177 uint8_t cyl = 0;
178 uint8_t sect_addr = 1;
179 uint8_t sect_size = 2;
180 uint8_t eot = nb_sect;
181 uint8_t gap = 0x1b;
182 uint8_t gpl = 0xff;
183
184 uint8_t msr = 0;
185 uint8_t st0;
186
187 uint8_t ret = 0;
188
189 floppy_send(CMD_READ);
190 floppy_send(head << 2 | drive);
191 g_assert(!get_irq(FLOPPY_IRQ));
192 floppy_send(cyl);
193 floppy_send(head);
194 floppy_send(sect_addr);
195 floppy_send(sect_size);
196 floppy_send(eot);
197 floppy_send(gap);
198 floppy_send(gpl);
199
200 uint16_t i = 0;
201 uint8_t n = 2;
202 for (; i < n; i++) {
203 msr = inb(FLOPPY_BASE + reg_msr);
204 if (msr == (BUSY | NONDMA | DIO | RQM)) {
205 break;
206 }
207 sleep(1);
208 }
209
210 if (i >= n) {
211 return 1;
212 }
213
214 /* Non-DMA mode */
215 for (i = 0; i < 512 * 2 * nb_sect; i++) {
216 msr = inb(FLOPPY_BASE + reg_msr);
217 assert_bit_set(msr, BUSY | RQM | DIO);
218 inb(FLOPPY_BASE + reg_fifo);
219 }
220
221 st0 = floppy_recv();
222 if (st0 != expected_st0) {
223 ret = 1;
224 }
225
226 floppy_recv();
227 floppy_recv();
228 floppy_recv();
229 floppy_recv();
230 floppy_recv();
231 floppy_recv();
232
233 return ret;
234 }
235
236 static void send_seek(int cyl)
237 {
238 int drive = 0;
239 int head = 0;
240
241 floppy_send(CMD_SEEK);
242 floppy_send(head << 2 | drive);
243 g_assert(!get_irq(FLOPPY_IRQ));
244 floppy_send(cyl);
245 ack_irq(NULL);
246 }
247
248 static uint8_t cmos_read(uint8_t reg)
249 {
250 outb(base + 0, reg);
251 return inb(base + 1);
252 }
253
254 static void test_cmos(void)
255 {
256 uint8_t cmos;
257
258 cmos = cmos_read(CMOS_FLOPPY);
259 g_assert(cmos == 0x40);
260 }
261
262 static void test_no_media_on_start(void)
263 {
264 uint8_t dir;
265
266 /* Media changed bit must be set all time after start if there is
267 * no media in drive. */
268 dir = inb(FLOPPY_BASE + reg_dir);
269 assert_bit_set(dir, DSKCHG);
270 dir = inb(FLOPPY_BASE + reg_dir);
271 assert_bit_set(dir, DSKCHG);
272 send_seek(1);
273 dir = inb(FLOPPY_BASE + reg_dir);
274 assert_bit_set(dir, DSKCHG);
275 dir = inb(FLOPPY_BASE + reg_dir);
276 assert_bit_set(dir, DSKCHG);
277 }
278
279 static void test_read_without_media(void)
280 {
281 uint8_t ret;
282
283 ret = send_read_command(CMD_READ);
284 g_assert(ret == 0);
285 }
286
287 static void test_media_insert(void)
288 {
289 uint8_t dir;
290
291 /* Insert media in drive. DSKCHK should not be reset until a step pulse
292 * is sent. */
293 qmp("{'execute':'change', 'arguments':{ 'device':'floppy0', "
294 "'target': '%s' }}", test_image);
295 qmp(""); /* ignore event (FIXME open -> open transition?!) */
296 qmp(""); /* ignore event */
297
298 dir = inb(FLOPPY_BASE + reg_dir);
299 assert_bit_set(dir, DSKCHG);
300 dir = inb(FLOPPY_BASE + reg_dir);
301 assert_bit_set(dir, DSKCHG);
302
303 send_seek(0);
304 dir = inb(FLOPPY_BASE + reg_dir);
305 assert_bit_set(dir, DSKCHG);
306 dir = inb(FLOPPY_BASE + reg_dir);
307 assert_bit_set(dir, DSKCHG);
308
309 /* Step to next track should clear DSKCHG bit. */
310 send_seek(1);
311 dir = inb(FLOPPY_BASE + reg_dir);
312 assert_bit_clear(dir, DSKCHG);
313 dir = inb(FLOPPY_BASE + reg_dir);
314 assert_bit_clear(dir, DSKCHG);
315 }
316
317 static void test_media_change(void)
318 {
319 uint8_t dir;
320
321 test_media_insert();
322
323 /* Eject the floppy and check that DSKCHG is set. Reading it out doesn't
324 * reset the bit. */
325 qmp("{'execute':'eject', 'arguments':{ 'device':'floppy0' }}");
326 qmp(""); /* ignore event */
327
328 dir = inb(FLOPPY_BASE + reg_dir);
329 assert_bit_set(dir, DSKCHG);
330 dir = inb(FLOPPY_BASE + reg_dir);
331 assert_bit_set(dir, DSKCHG);
332
333 send_seek(0);
334 dir = inb(FLOPPY_BASE + reg_dir);
335 assert_bit_set(dir, DSKCHG);
336 dir = inb(FLOPPY_BASE + reg_dir);
337 assert_bit_set(dir, DSKCHG);
338
339 send_seek(1);
340 dir = inb(FLOPPY_BASE + reg_dir);
341 assert_bit_set(dir, DSKCHG);
342 dir = inb(FLOPPY_BASE + reg_dir);
343 assert_bit_set(dir, DSKCHG);
344 }
345
346 static void test_sense_interrupt(void)
347 {
348 int drive = 0;
349 int head = 0;
350 int cyl = 0;
351 int ret = 0;
352
353 floppy_send(CMD_SENSE_INT);
354 ret = floppy_recv();
355 g_assert(ret == 0x80);
356
357 floppy_send(CMD_SEEK);
358 floppy_send(head << 2 | drive);
359 g_assert(!get_irq(FLOPPY_IRQ));
360 floppy_send(cyl);
361
362 floppy_send(CMD_SENSE_INT);
363 ret = floppy_recv();
364 g_assert(ret == 0x20);
365 floppy_recv();
366 }
367
368 static void test_relative_seek(void)
369 {
370 uint8_t drive = 0;
371 uint8_t head = 0;
372 uint8_t cyl = 1;
373 uint8_t pcn;
374
375 /* Send seek to track 0 */
376 send_seek(0);
377
378 /* Send relative seek to increase track by 1 */
379 floppy_send(CMD_RELATIVE_SEEK_IN);
380 floppy_send(head << 2 | drive);
381 g_assert(!get_irq(FLOPPY_IRQ));
382 floppy_send(cyl);
383
384 ack_irq(&pcn);
385 g_assert(pcn == 1);
386
387 /* Send relative seek to decrease track by 1 */
388 floppy_send(CMD_RELATIVE_SEEK_OUT);
389 floppy_send(head << 2 | drive);
390 g_assert(!get_irq(FLOPPY_IRQ));
391 floppy_send(cyl);
392
393 ack_irq(&pcn);
394 g_assert(pcn == 0);
395 }
396
397 static void test_read_id(void)
398 {
399 uint8_t drive = 0;
400 uint8_t head = 0;
401 uint8_t cyl;
402 uint8_t st0;
403
404 /* Seek to track 0 and check with READ ID */
405 send_seek(0);
406
407 floppy_send(CMD_READ_ID);
408 g_assert(!get_irq(FLOPPY_IRQ));
409 floppy_send(head << 2 | drive);
410
411 while (!get_irq(FLOPPY_IRQ)) {
412 /* qemu involves a timer with READ ID... */
413 clock_step(1000000000LL / 50);
414 }
415
416 st0 = floppy_recv();
417 floppy_recv();
418 floppy_recv();
419 cyl = floppy_recv();
420 head = floppy_recv();
421 floppy_recv();
422 floppy_recv();
423
424 g_assert_cmpint(cyl, ==, 0);
425 g_assert_cmpint(head, ==, 0);
426 g_assert_cmpint(st0, ==, head << 2);
427
428 /* Seek to track 8 on head 1 and check with READ ID */
429 head = 1;
430 cyl = 8;
431
432 floppy_send(CMD_SEEK);
433 floppy_send(head << 2 | drive);
434 g_assert(!get_irq(FLOPPY_IRQ));
435 floppy_send(cyl);
436 g_assert(get_irq(FLOPPY_IRQ));
437 ack_irq(NULL);
438
439 floppy_send(CMD_READ_ID);
440 g_assert(!get_irq(FLOPPY_IRQ));
441 floppy_send(head << 2 | drive);
442
443 while (!get_irq(FLOPPY_IRQ)) {
444 /* qemu involves a timer with READ ID... */
445 clock_step(1000000000LL / 50);
446 }
447
448 st0 = floppy_recv();
449 floppy_recv();
450 floppy_recv();
451 cyl = floppy_recv();
452 head = floppy_recv();
453 floppy_recv();
454 floppy_recv();
455
456 g_assert_cmpint(cyl, ==, 8);
457 g_assert_cmpint(head, ==, 1);
458 g_assert_cmpint(st0, ==, head << 2);
459 }
460
461 static void test_read_no_dma_1(void)
462 {
463 uint8_t ret;
464
465 outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
466 send_seek(0);
467 ret = send_read_no_dma_command(1, 0x04);
468 g_assert(ret == 0);
469 }
470
471 static void test_read_no_dma_18(void)
472 {
473 uint8_t ret;
474
475 outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
476 send_seek(0);
477 ret = send_read_no_dma_command(18, 0x04);
478 g_assert(ret == 0);
479 }
480
481 static void test_read_no_dma_19(void)
482 {
483 uint8_t ret;
484
485 outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
486 send_seek(0);
487 ret = send_read_no_dma_command(19, 0x20);
488 g_assert(ret == 0);
489 }
490
491 static void test_verify(void)
492 {
493 uint8_t ret;
494
495 ret = send_read_command(CMD_VERIFY);
496 g_assert(ret == 0);
497 }
498
499 /* success if no crash or abort */
500 static void fuzz_registers(void)
501 {
502 unsigned int i;
503
504 for (i = 0; i < 1000; i++) {
505 uint8_t reg, val;
506
507 reg = (uint8_t)g_test_rand_int_range(0, 8);
508 val = (uint8_t)g_test_rand_int_range(0, 256);
509
510 outb(FLOPPY_BASE + reg, val);
511 inb(FLOPPY_BASE + reg);
512 }
513 }
514
515 int main(int argc, char **argv)
516 {
517 const char *arch = qtest_get_arch();
518 char *cmdline;
519 int fd;
520 int ret;
521
522 /* Check architecture */
523 if (strcmp(arch, "i386") && strcmp(arch, "x86_64")) {
524 g_test_message("Skipping test for non-x86\n");
525 return 0;
526 }
527
528 /* Create a temporary raw image */
529 fd = mkstemp(test_image);
530 g_assert(fd >= 0);
531 ret = ftruncate(fd, TEST_IMAGE_SIZE);
532 g_assert(ret == 0);
533 close(fd);
534
535 /* Run the tests */
536 g_test_init(&argc, &argv, NULL);
537
538 cmdline = g_strdup_printf("-vnc none ");
539
540 qtest_start(cmdline);
541 qtest_irq_intercept_in(global_qtest, "ioapic");
542 qtest_add_func("/fdc/cmos", test_cmos);
543 qtest_add_func("/fdc/no_media_on_start", test_no_media_on_start);
544 qtest_add_func("/fdc/read_without_media", test_read_without_media);
545 qtest_add_func("/fdc/media_change", test_media_change);
546 qtest_add_func("/fdc/sense_interrupt", test_sense_interrupt);
547 qtest_add_func("/fdc/relative_seek", test_relative_seek);
548 qtest_add_func("/fdc/read_id", test_read_id);
549 qtest_add_func("/fdc/verify", test_verify);
550 qtest_add_func("/fdc/media_insert", test_media_insert);
551 qtest_add_func("/fdc/read_no_dma_1", test_read_no_dma_1);
552 qtest_add_func("/fdc/read_no_dma_18", test_read_no_dma_18);
553 qtest_add_func("/fdc/read_no_dma_19", test_read_no_dma_19);
554 qtest_add_func("/fdc/fuzz-registers", fuzz_registers);
555
556 ret = g_test_run();
557
558 /* Cleanup */
559 qtest_quit(global_qtest);
560 unlink(test_image);
561
562 return ret;
563 }