trap signals for "-serial mon:stdio"
[qemu.git] / tests / tcg / test-i386-fprem.c
1 /*
2 * x86 FPREM test - executes the FPREM and FPREM1 instructions with corner case
3 * operands and prints the operands, result and FPU status word.
4 *
5 * Run this on real hardware, then under QEMU, and diff the outputs, to compare
6 * QEMU's implementation to your hardware. The 'run-test-i386-fprem' make
7 * target does this.
8 *
9 * Copyright (c) 2003 Fabrice Bellard
10 * Copyright (c) 2012 Catalin Patulea
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <http://www.gnu.org/licenses/>.
24 */
25 #include "qemu/compiler.h"
26 #include "qemu/osdep.h"
27 #include <stdio.h>
28 #include <inttypes.h>
29
30 /*
31 * Inspired by <ieee754.h>'s union ieee854_long_double, but with single
32 * long long mantissa fields and assuming little-endianness for simplicity.
33 */
34 union float80u {
35 long double d;
36
37 /* This is the IEEE 854 double-extended-precision format. */
38 struct {
39 unsigned long long mantissa:63;
40 unsigned int one:1;
41 unsigned int exponent:15;
42 unsigned int negative:1;
43 unsigned int empty:16;
44 } QEMU_PACKED ieee;
45
46 /* This is for NaNs in the IEEE 854 double-extended-precision format. */
47 struct {
48 unsigned long long mantissa:62;
49 unsigned int quiet_nan:1;
50 unsigned int one:1;
51 unsigned int exponent:15;
52 unsigned int negative:1;
53 unsigned int empty:16;
54 } QEMU_PACKED ieee_nan;
55 };
56
57 #define IEEE854_LONG_DOUBLE_BIAS 0x3fff
58
59 static const union float80u q_nan = {
60 .ieee_nan.negative = 0, /* X */
61 .ieee_nan.exponent = 0x7fff,
62 .ieee_nan.one = 1,
63 .ieee_nan.quiet_nan = 1,
64 .ieee_nan.mantissa = 0,
65 };
66
67 static const union float80u s_nan = {
68 .ieee_nan.negative = 0, /* X */
69 .ieee_nan.exponent = 0x7fff,
70 .ieee_nan.one = 1,
71 .ieee_nan.quiet_nan = 0,
72 .ieee_nan.mantissa = 1, /* nonzero */
73 };
74
75 static const union float80u pos_inf = {
76 .ieee.negative = 0,
77 .ieee.exponent = 0x7fff,
78 .ieee.one = 1,
79 .ieee.mantissa = 0,
80 };
81
82 static const union float80u pseudo_pos_inf = { /* "unsupported" */
83 .ieee.negative = 0,
84 .ieee.exponent = 0x7fff,
85 .ieee.one = 0,
86 .ieee.mantissa = 0,
87 };
88
89 static const union float80u pos_denorm = {
90 .ieee.negative = 0,
91 .ieee.exponent = 0,
92 .ieee.one = 0,
93 .ieee.mantissa = 1,
94 };
95
96 static const union float80u smallest_positive_norm = {
97 .ieee.negative = 0,
98 .ieee.exponent = 1,
99 .ieee.one = 1,
100 .ieee.mantissa = 0,
101 };
102
103 static void fninit()
104 {
105 asm volatile ("fninit\n");
106 }
107
108 static long double fprem(long double a, long double b, uint16_t *sw)
109 {
110 long double result;
111 asm volatile ("fprem\n"
112 "fnstsw %1\n"
113 : "=t" (result), "=m" (*sw)
114 : "0" (a), "u" (b)
115 : "st(1)");
116 return result;
117 }
118
119 static long double fprem1(long double a, long double b, uint16_t *sw)
120 {
121 long double result;
122 asm volatile ("fprem1\n"
123 "fnstsw %1\n"
124 : "=t" (result), "=m" (*sw)
125 : "0" (a), "u" (b)
126 : "st(1)");
127 return result;
128 }
129
130 #define FPUS_IE (1 << 0)
131 #define FPUS_DE (1 << 1)
132 #define FPUS_ZE (1 << 2)
133 #define FPUS_OE (1 << 3)
134 #define FPUS_UE (1 << 4)
135 #define FPUS_PE (1 << 5)
136 #define FPUS_SF (1 << 6)
137 #define FPUS_SE (1 << 7)
138 #define FPUS_C0 (1 << 8)
139 #define FPUS_C1 (1 << 9)
140 #define FPUS_C2 (1 << 10)
141 #define FPUS_TOP 0x3800
142 #define FPUS_C3 (1 << 14)
143 #define FPUS_B (1 << 15)
144
145 #define FPUS_EMASK 0x007f
146
147 #define FPUC_EM 0x3f
148
149 static void psw(uint16_t sw)
150 {
151 printf("SW: C3 TopC2C1C0\n");
152 printf("SW: %c %d %3d %d %d %d %c %c %c %c %c %c %c %c\n",
153 sw & FPUS_B ? 'B' : 'b',
154 !!(sw & FPUS_C3),
155 (sw & FPUS_TOP) >> 11,
156 !!(sw & FPUS_C2),
157 !!(sw & FPUS_C1),
158 !!(sw & FPUS_C0),
159 (sw & FPUS_SE) ? 'S' : 's',
160 (sw & FPUS_SF) ? 'F' : 'f',
161 (sw & FPUS_PE) ? 'P' : 'p',
162 (sw & FPUS_UE) ? 'U' : 'u',
163 (sw & FPUS_OE) ? 'O' : 'o',
164 (sw & FPUS_ZE) ? 'Z' : 'z',
165 (sw & FPUS_DE) ? 'D' : 'd',
166 (sw & FPUS_IE) ? 'I' : 'i');
167 }
168
169 static void do_fprem(long double a, long double b)
170 {
171 const union float80u au = {.d = a};
172 const union float80u bu = {.d = b};
173 union float80u ru;
174 uint16_t sw;
175
176 printf("A: S=%d Exp=%04x Int=%d (QNaN=%d) Sig=%016llx (%.06Le)\n",
177 au.ieee.negative, au.ieee.exponent, au.ieee.one,
178 au.ieee_nan.quiet_nan, (unsigned long long)au.ieee.mantissa,
179 a);
180 printf("B: S=%d Exp=%04x Int=%d (QNaN=%d) Sig=%016llx (%.06Le)\n",
181 bu.ieee.negative, bu.ieee.exponent, bu.ieee.one,
182 bu.ieee_nan.quiet_nan, (unsigned long long)bu.ieee.mantissa,
183 b);
184 fflush(stdout);
185
186 fninit();
187 ru.d = fprem(a, b, &sw);
188 psw(sw);
189
190 printf("R : S=%d Exp=%04x Int=%d (QNaN=%d) Sig=%016llx (%.06Le)\n",
191 ru.ieee.negative, ru.ieee.exponent, ru.ieee.one,
192 ru.ieee_nan.quiet_nan, (unsigned long long)ru.ieee.mantissa,
193 ru.d);
194
195 fninit();
196 ru.d = fprem1(a, b, &sw);
197 psw(sw);
198
199 printf("R1: S=%d Exp=%04x Int=%d (QNaN=%d) Sig=%016llx (%.06Le)\n",
200 ru.ieee.negative, ru.ieee.exponent, ru.ieee.one,
201 ru.ieee_nan.quiet_nan, (unsigned long long)ru.ieee.mantissa,
202 ru.d);
203
204 printf("\n");
205 }
206
207 static void do_fprem_stack_underflow(void)
208 {
209 const long double a = 1.0;
210 union float80u ru;
211 uint16_t sw;
212
213 fninit();
214 asm volatile ("fprem\n"
215 "fnstsw %1\n"
216 : "=t" (ru.d), "=m" (sw)
217 : "0" (a)
218 : "st(1)");
219 psw(sw);
220
221 printf("R: S=%d Exp=%04x Int=%d (QNaN=%d) Sig=%016llx (%.06Le)\n",
222 ru.ieee.negative, ru.ieee.exponent, ru.ieee.one,
223 ru.ieee_nan.quiet_nan, (unsigned long long)ru.ieee.mantissa,
224 ru.d);
225 printf("\n");
226 }
227
228 static void test_fprem_cases(void)
229 {
230 printf("= stack underflow =\n");
231 do_fprem_stack_underflow();
232
233 printf("= invalid operation =\n");
234 do_fprem(s_nan.d, 1.0);
235 do_fprem(1.0, 0.0);
236 do_fprem(pos_inf.d, 1.0);
237 do_fprem(pseudo_pos_inf.d, 1.0);
238
239 printf("= denormal =\n");
240 do_fprem(pos_denorm.d, 1.0);
241 do_fprem(1.0, pos_denorm.d);
242
243 /* printf("= underflow =\n"); */
244 /* TODO: Is there a case where FPREM raises underflow? */
245 }
246
247 static void test_fprem_pairs(void)
248 {
249 unsigned long long count;
250
251 unsigned int negative_index_a = 0;
252 unsigned int negative_index_b = 0;
253 static const unsigned int negative_values[] = {
254 0,
255 1,
256 };
257
258 unsigned int exponent_index_a = 0;
259 unsigned int exponent_index_b = 0;
260 static const unsigned int exponent_values[] = {
261 0,
262 1,
263 2,
264 IEEE854_LONG_DOUBLE_BIAS - 1,
265 IEEE854_LONG_DOUBLE_BIAS,
266 IEEE854_LONG_DOUBLE_BIAS + 1,
267 0x7ffd,
268 0x7ffe,
269 0x7fff,
270 };
271
272 unsigned int one_index_a = 0;
273 unsigned int one_index_b = 0;
274 static const unsigned int one_values[] = {
275 0,
276 1,
277 };
278
279 unsigned int quiet_nan_index_a = 0;
280 unsigned int quiet_nan_index_b = 0;
281 static const unsigned int quiet_nan_values[] = {
282 0,
283 1,
284 };
285
286 unsigned int mantissa_index_a = 0;
287 unsigned int mantissa_index_b = 0;
288 static const unsigned long long mantissa_values[] = {
289 0,
290 1,
291 2,
292 0x3ffffffffffffffdULL,
293 0x3ffffffffffffffeULL,
294 0x3fffffffffffffffULL,
295 };
296
297 for (count = 0; ; ++count) {
298 #define INIT_FIELD(var, field) \
299 .ieee_nan.field = field##_values[field##_index_##var]
300 const union float80u a = {
301 INIT_FIELD(a, negative),
302 INIT_FIELD(a, exponent),
303 INIT_FIELD(a, one),
304 INIT_FIELD(a, quiet_nan),
305 INIT_FIELD(a, mantissa),
306 };
307 const union float80u b = {
308 INIT_FIELD(b, negative),
309 INIT_FIELD(b, exponent),
310 INIT_FIELD(b, one),
311 INIT_FIELD(b, quiet_nan),
312 INIT_FIELD(b, mantissa),
313 };
314 #undef INIT_FIELD
315
316 do_fprem(a.d, b.d);
317
318 int carry = 1;
319 #define CARRY_INTO(var, field) do { \
320 if (carry) { \
321 if (++field##_index_##var == ARRAY_SIZE(field##_values)) { \
322 field##_index_##var = 0; \
323 } else { \
324 carry = 0; \
325 } \
326 } \
327 } while (0)
328 CARRY_INTO(b, mantissa);
329 CARRY_INTO(b, quiet_nan);
330 CARRY_INTO(b, one);
331 CARRY_INTO(b, exponent);
332 CARRY_INTO(b, negative);
333 CARRY_INTO(a, mantissa);
334 CARRY_INTO(a, quiet_nan);
335 CARRY_INTO(a, one);
336 CARRY_INTO(a, exponent);
337 CARRY_INTO(a, negative);
338 #undef CARRY_INTO
339
340 if (carry) {
341 break;
342 }
343 }
344
345 fprintf(stderr, "test-i386-fprem: tested %llu cases\n", count);
346 }
347
348 int main(int argc, char **argv)
349 {
350 test_fprem_cases();
351 test_fprem_pairs();
352 return 0;
353 }