ppc/pnv: Add OCC model stub with interrupt support
authorBenjamin Herrenschmidt <benh@kernel.crashing.org>
Wed, 5 Apr 2017 12:41:27 +0000 (14:41 +0200)
committerDavid Gibson <david@gibson.dropbear.id.au>
Wed, 26 Apr 2017 02:00:42 +0000 (12:00 +1000)
commit0722d05ad8516636e3c2e9033cba7d2d27b59624
tree9f3dc99f186716150ed833a456fb3c533b16906b
parent54f59d786c05765bf7410eadd10e88f5579df9e7
ppc/pnv: Add OCC model stub with interrupt support

The OCC is an on-chip microcontroller based on a ppc405 core used
for various power management tasks. It comes with a pile of additional
hardware sitting on the PIB (aka XSCOM bus). At this point we don't
emulate it (nor plan to do so). However there is one facility which
is provided by the surrounding hardware that we do need, which is the
interrupt generation facility. OPAL uses it to send itself interrupts
under some circumstances and there are other uses around the corner.

So this implement just enough to support this.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[clg: - updated for qemu-2.9
      - changed the XSCOM interface to fit new model
      - QOMified the model ]
Signed-off-by: C├ędric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
hw/ppc/Makefile.objs
hw/ppc/pnv.c
hw/ppc/pnv_occ.c [new file with mode: 0644]
include/hw/ppc/pnv.h
include/hw/ppc/pnv_occ.h [new file with mode: 0644]
include/hw/ppc/pnv_xscom.h