qemu.git
9 months agohw/block/nvme: replace dma_acct with blk_acct equivalent
Klaus Jensen [Mon, 30 Mar 2020 20:22:38 +0000 (22:22 +0200)] 
hw/block/nvme: replace dma_acct with blk_acct equivalent

The QSG isn't always initialized, so accounting could be wrong. Issue a
call to blk_acct_start instead with the size taken from the QSG or IOV
depending on the kind of I/O.

Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: Minwoo Im <minwoo.im.dev@gmail.com>
9 months agohw/block/nvme: add mapping helpers
Klaus Jensen [Sun, 23 Feb 2020 13:21:52 +0000 (14:21 +0100)] 
hw/block/nvme: add mapping helpers

Add nvme_map_addr, nvme_map_addr_cmb and nvme_addr_to_cmb helpers and
use them in nvme_map_prp.

This fixes a bug where in the case of a CMB transfer, the device would
map to the buffer with a wrong length.

Fixes: b2b2b67a00574 ("nvme: Add support for Read Data and Write Data in CMBs.")
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: Minwoo Im <minwoo.im.dev@gmail.com>
Reviewed-by: Andrzej Jakowski <andrzej.jakowski@linux.intel.com>
9 months agohw/block/nvme: memset preallocated requests structures
Klaus Jensen [Sun, 23 Feb 2020 15:37:49 +0000 (16:37 +0100)] 
hw/block/nvme: memset preallocated requests structures

This is preparatory to subsequent patches that change how QSGs/IOVs are
handled. It is important that the qsg and iov members of the NvmeRequest
are initially zeroed.

Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: Minwoo Im <minwoo.im.dev@gmail.com>
9 months agohw/block/nvme: bump supported version to v1.3
Klaus Jensen [Mon, 6 Jul 2020 06:13:03 +0000 (08:13 +0200)] 
hw/block/nvme: bump supported version to v1.3

Bump the supported NVM Express version to v1.3.

Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Message-Id: <20200706061303.246057-19-its@irrelevant.dk>

9 months agohw/block/nvme: provide the mandatory subnqn field
Klaus Jensen [Mon, 6 Jul 2020 06:13:02 +0000 (08:13 +0200)] 
hw/block/nvme: provide the mandatory subnqn field

The SUBNQN field is mandatory in NVM Express 1.3.

Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Message-Id: <20200706061303.246057-18-its@irrelevant.dk>

9 months agohw/block/nvme: enforce valid queue creation sequence
Klaus Jensen [Mon, 6 Jul 2020 06:13:01 +0000 (08:13 +0200)] 
hw/block/nvme: enforce valid queue creation sequence

Support returning Command Sequence Error if Set Features on Number of
Queues is called after queues have been created.

Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Message-Id: <20200706061303.246057-17-its@irrelevant.dk>

9 months agohw/block/nvme: reject invalid nsid values in active namespace id list
Klaus Jensen [Mon, 6 Jul 2020 06:13:00 +0000 (08:13 +0200)] 
hw/block/nvme: reject invalid nsid values in active namespace id list

Reject the nsid broadcast value (0xffffffff) and 0xfffffffe in the
Active Namespace ID list.

Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Message-Id: <20200706061303.246057-16-its@irrelevant.dk>

9 months agohw/block/nvme: support identify namespace descriptor list
Klaus Jensen [Mon, 6 Jul 2020 06:12:59 +0000 (08:12 +0200)] 
hw/block/nvme: support identify namespace descriptor list

Since we are not providing the NGUID or EUI64 fields, we must support
the Namespace UUID. We do not have any way of storing a persistent
unique identifier, so conjure up a UUID that is just the namespace id.

Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Message-Id: <20200706061303.246057-15-its@irrelevant.dk>

9 months agohw/block/nvme: make sure ncqr and nsqr is valid
Klaus Jensen [Mon, 6 Jul 2020 06:12:58 +0000 (08:12 +0200)] 
hw/block/nvme: make sure ncqr and nsqr is valid

0xffff is not an allowed value for NCQR and NSQR in Set Features on
Number of Queues.

Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Acked-by: Keith Busch <kbusch@kernel.org>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Message-Id: <20200706061303.246057-14-its@irrelevant.dk>

9 months agohw/block/nvme: support the get/set features select and save fields
Klaus Jensen [Mon, 6 Jul 2020 06:12:57 +0000 (08:12 +0200)] 
hw/block/nvme: support the get/set features select and save fields

Since the device does not have any persistent state storage, no
features are "saveable" and setting the Save (SV) field in any Set
Features command will result in a Feature Identifier Not Saveable status
code.

Similarly, if the Select (SEL) field is set to request saved values, the
devices will (as it should) return the default values instead.

Since this also introduces "Supported Capabilities", the nsid field is
now also checked for validity wrt. the feature being get/set'ed.

Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Message-Id: <20200706061303.246057-13-its@irrelevant.dk>

9 months agohw/block/nvme: add remaining mandatory controller parameters
Klaus Jensen [Mon, 6 Jul 2020 06:12:56 +0000 (08:12 +0200)] 
hw/block/nvme: add remaining mandatory controller parameters

Add support for any remaining mandatory controller operating parameters
(features).

Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Message-Id: <20200706061303.246057-12-its@irrelevant.dk>

9 months agohw/block/nvme: flush write cache when disabled
Klaus Jensen [Mon, 6 Jul 2020 06:12:55 +0000 (08:12 +0200)] 
hw/block/nvme: flush write cache when disabled

If the write cache is disabled with a Set Features command, flush it if
currently enabled.

Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Message-Id: <20200706061303.246057-11-its@irrelevant.dk>

9 months agohw/block/nvme: move NvmeFeatureVal into hw/block/nvme.h
Klaus Jensen [Mon, 6 Jul 2020 06:12:54 +0000 (08:12 +0200)] 
hw/block/nvme: move NvmeFeatureVal into hw/block/nvme.h

The NvmeFeatureVal does not belong with the spec-related data structures
in include/block/nvme.h that is shared between the block-level nvme
driver and the emulated nvme device.

Move it into the nvme device specific header file as it is the only
user of the structure. Also, remove the unused members.

Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Message-Id: <20200706061303.246057-10-its@irrelevant.dk>

9 months agohw/block/nvme: add support for the asynchronous event request command
Klaus Jensen [Mon, 6 Jul 2020 06:12:53 +0000 (08:12 +0200)] 
hw/block/nvme: add support for the asynchronous event request command

Add support for the Asynchronous Event Request command. Required for
compliance with NVMe revision 1.3d. See NVM Express 1.3d, Section 5.2
("Asynchronous Event Request command").

Mostly imported from Keith's qemu-nvme tree. Modified with a max number
of queued events (controllable with the aer_max_queued device
parameter). The spec states that the controller *should* retain
events, so we do best effort here.

Signed-off-by: Klaus Jensen <klaus.jensen@cnexlabs.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Acked-by: Keith Busch <kbusch@kernel.org>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Message-Id: <20200706061303.246057-9-its@irrelevant.dk>

9 months agohw/block/nvme: add support for the get log page command
Klaus Jensen [Mon, 6 Jul 2020 06:12:52 +0000 (08:12 +0200)] 
hw/block/nvme: add support for the get log page command

Add support for the Get Log Page command and basic implementations of
the mandatory Error Information, SMART / Health Information and Firmware
Slot Information log pages.

In violation of the specification, the SMART / Health Information log
page does not persist information over the lifetime of the controller
because the device has no place to store such persistent state.

Note that the LPA field in the Identify Controller data structure
intentionally has bit 0 cleared because there is no namespace specific
information in the SMART / Health information log page.

Required for compliance with NVMe revision 1.3d. See NVM Express 1.3d,
Section 5.14 ("Get Log Page command").

Signed-off-by: Klaus Jensen <klaus.jensen@cnexlabs.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Acked-by: Keith Busch <kbusch@kernel.org>
Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Message-Id: <20200706061303.246057-8-its@irrelevant.dk>

9 months agohw/block/nvme: mark fw slot 1 as read-only
Klaus Jensen [Mon, 6 Jul 2020 06:12:51 +0000 (08:12 +0200)] 
hw/block/nvme: mark fw slot 1 as read-only

Mark firmware slot 1 as read-only and only support that slot.

Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Message-Id: <20200706061303.246057-7-its@irrelevant.dk>

9 months agohw/block/nvme: add temperature threshold feature
Klaus Jensen [Mon, 6 Jul 2020 06:12:50 +0000 (08:12 +0200)] 
hw/block/nvme: add temperature threshold feature

It might seem weird to implement this feature for an emulated device,
but it is mandatory to support and the feature is useful for testing
asynchronous event request support, which will be added in a later
patch.

Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Acked-by: Keith Busch <kbusch@kernel.org>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Message-Id: <20200706061303.246057-6-its@irrelevant.dk>

9 months agohw/block/nvme: add support for the abort command
Klaus Jensen [Mon, 6 Jul 2020 06:12:49 +0000 (08:12 +0200)] 
hw/block/nvme: add support for the abort command

Required for compliance with NVMe revision 1.3d. See NVM Express 1.3d,
Section 5.1 ("Abort command").

The Abort command is a best effort command; for now, the device always
fails to abort the given command.

Signed-off-by: Klaus Jensen <klaus.jensen@cnexlabs.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Acked-by: Keith Busch <kbusch@kernel.org>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Message-Id: <20200706061303.246057-5-its@irrelevant.dk>

9 months agohw/block/nvme: additional tracing
Klaus Jensen [Mon, 6 Jul 2020 06:12:48 +0000 (08:12 +0200)] 
hw/block/nvme: additional tracing

Add various additional tracing and streamline nvme_identify_ns and
nvme_identify_nslist (they do not need to repeat the command, it is
already in the trace name).

Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Message-Id: <20200706061303.246057-4-its@irrelevant.dk>

9 months agohw/block/nvme: fix missing endian conversion
Klaus Jensen [Mon, 6 Jul 2020 06:12:47 +0000 (08:12 +0200)] 
hw/block/nvme: fix missing endian conversion

Fix a missing cpu_to conversion by moving conversion to just before
returning instead.

Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Suggested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Message-Id: <20200706061303.246057-3-its@irrelevant.dk>

9 months agohw/block/nvme: bump spec data structures to v1.3
Klaus Jensen [Mon, 6 Jul 2020 06:12:46 +0000 (08:12 +0200)] 
hw/block/nvme: bump spec data structures to v1.3

Add missing fields in the Identify Controller and Identify Namespace
data structures to bring them in line with NVMe v1.3.

This also adds data structures and defines for SGL support which
requires a couple of trivial changes to the nvme block driver as well.

Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Acked-by: Fam Zheng <fam@euphon.net>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Message-Id: <20200706061303.246057-2-its@irrelevant.dk>

9 months agohw/block/nvme: Align I/O BAR to 4 KiB
Philippe Mathieu-Daudé [Tue, 30 Jun 2020 11:04:29 +0000 (13:04 +0200)] 
hw/block/nvme: Align I/O BAR to 4 KiB

Simplify the NVMe emulated device by aligning the I/O BAR to 4 KiB.

Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Klaus Jensen <k.jensen@samsung.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20200630110429.19972-5-philmd@redhat.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
9 months agohw/block/nvme: Fix pmrmsc register size
Philippe Mathieu-Daudé [Tue, 30 Jun 2020 11:04:28 +0000 (13:04 +0200)] 
hw/block/nvme: Fix pmrmsc register size

The Persistent Memory Region Controller Memory Space Control
register is 64-bit wide. See 'Figure 68: Register Definition'
of the 'NVM Express Base Specification Revision 1.4'.

Fixes: 6cf9413229 ("introduce PMR support from NVMe 1.4 spec")
Reported-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Klaus Jensen <k.jensen@samsung.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20200630110429.19972-4-philmd@redhat.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
9 months agohw/block/nvme: Use QEMU_PACKED on hardware/packet structures
Philippe Mathieu-Daudé [Tue, 30 Jun 2020 11:04:27 +0000 (13:04 +0200)] 
hw/block/nvme: Use QEMU_PACKED on hardware/packet structures

These structures either describe hardware registers, or
commands ('packets') to send to the hardware. To forbid
the compiler to optimize and change fields alignment,
mark the structures as packed.

Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Klaus Jensen <k.jensen@samsung.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20200630110429.19972-3-philmd@redhat.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
9 months agohw/block/nvme: Update specification URL
Philippe Mathieu-Daudé [Tue, 30 Jun 2020 11:04:26 +0000 (13:04 +0200)] 
hw/block/nvme: Update specification URL

At some point the URL changed, update it to avoid other
developers to search for it.

Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Klaus Jensen <k.jensen@samsung.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20200630110429.19972-2-philmd@redhat.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
9 months agoMAINTAINERS: update nvme entry
Keith Busch [Mon, 6 Jul 2020 18:29:22 +0000 (11:29 -0700)] 
MAINTAINERS: update nvme entry

The nvme emulated device development pace has increased recently.  Klaus
has offered to co-maintain, and since we have many new contributions
coming through, we're adding a repository to accumulate and test new
features.

Cc: Klaus Jensen <its@irrelevant.dk>
Acked-by: Klaus Jensen <k.jensen@samsung.com>
Acked-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Keith Busch <kbusch@kernel.org>
9 months agoMerge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging
Peter Maydell [Tue, 1 Sep 2020 21:50:23 +0000 (22:50 +0100)] 
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging

meson fixes:
* bump submodule to 0.55.1
* SDL, pixman and zlib fixes
* firmwarepath fix
* fix firmware builds

meson related:
* move install to Meson
* move NSIS to Meson
* do not make meson use cmake
* add description to options

# gpg: Signature made Tue 01 Sep 2020 17:11:03 BST
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini-gitlab/tags/for-upstream: (26 commits)
  Makefile: Fix in-tree clean/distclean
  Makefile: Add back TAGS/ctags/cscope rules
  meson: add description to options
  build: fix recurse-all target
  meson: use pkg-config method to find dependencies
  configure: do not include ${prefix} in firmwarepath
  meson: add pixman dependency to UI modules
  meson: add pixman dependency to chardev/baum module
  meson: add NSIS building
  meson: use meson mandir instead of qemu_mandir
  meson: pass docdir option
  meson: use meson datadir instead of qemu_datadir
  meson: pass qemu_suffix option
  configure: build docdir like other suffixed directories
  configure: always /-seperate directory from qemu_suffix
  configure: rename confsuffix option
  meson: move zlib detection to meson
  build-sys: remove install target from Makefile
  meson: install $localstatedir/run for qga
  meson: install desktop file
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9 months agoMakefile: Fix in-tree clean/distclean
Greg Kurz [Tue, 1 Sep 2020 14:20:16 +0000 (16:20 +0200)] 
Makefile: Fix in-tree clean/distclean

Doing 'make clean' or 'make distclean' in a freshly cloned tree results in:

make: *** No rule to make target 'ninja-clean', needed by 'clean'.  Stop.

Make the fallback rules global. While here, change the ninjatool recipe to
always have a zero exit status and thus prevent make to emit a warning.

Fixes: a56650518f5b ("configure: integrate Meson in the build system")
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <159897001659.442705.15538955005543395950.stgit@bahia.lan>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agoMakefile: Add back TAGS/ctags/cscope rules
Greg Kurz [Tue, 1 Sep 2020 14:20:10 +0000 (16:20 +0200)] 
Makefile: Add back TAGS/ctags/cscope rules

It is a bit of a pain to be forced to run configure before being able
to use cscope and friends. Add back the rules to build them in-tree
as before commit a56650518f5b.

Fixes: a56650518f5b ("configure: integrate Meson in the build system")
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <159897001005.442705.16516671603870288336.stgit@bahia.lan>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agoMerge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200901' into...
Peter Maydell [Tue, 1 Sep 2020 15:51:37 +0000 (16:51 +0100)] 
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200901' into staging

target-arm queue:
 * Implement fp16 support for AArch32 VFP and Neon
 * hw/arm/sbsa-ref: add "reg" property to DT cpu nodes
 * hw/arm/sbsa-ref : Add embedded controller in secure memory

# gpg: Signature made Tue 01 Sep 2020 16:17:23 BST
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20200901: (47 commits)
  hw/arm/sbsa-ref : Add embedded controller in secure memory
  hw/misc/sbsa_ec : Add an embedded controller for sbsa-ref
  hw/arm/sbsa-ref: add "reg" property to DT cpu nodes
  target/arm: Enable FP16 in '-cpu max'
  target/arm: Implement fp16 for Neon VMUL, VMLA, VMLS
  target/arm/vec_helper: Add gvec fp indexed multiply-and-add operations
  target/arm/vec_helper: Handle oprsz less than 16 bytes in indexed operations
  target/arm: Implement fp16 for Neon VRINTX
  target/arm: Implement fp16 for Neon VRINT-with-specified-rounding-mode
  target/arm: Implement fp16 for Neon VCVT with rounding modes
  target/arm: Implement fp16 for Neon VCVT fixed-point
  target/arm: Convert Neon VCVT fixed-point to gvec
  target/arm: Implement fp16 for Neon float-integer VCVT
  target/arm: Implement fp16 for Neon pairwise fp ops
  target/arm: Implement fp16 for Neon VRSQRTS
  target/arm: Implement fp16 for Neon VRECPS
  target/arm: Implement fp16 for Neon fp compare-vs-0
  target/arm: Implement fp16 for Neon VFMA, VMFS
  target/arm: Implement fp16 for Neon VMLA, VMLS operations
  target/arm: Implement fp16 for Neon VMAXNM, VMINNM
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
9 months agotarget/microblaze: Reduce linux-user address space to 32-bit
Richard Henderson [Tue, 25 Aug 2020 19:37:12 +0000 (12:37 -0700)] 
target/microblaze: Reduce linux-user address space to 32-bit

User-space programs cannot use the 64-bit lwea/swea instructions.
We can improve code generation and runtime by restricting the
user-only address space to 32-bit.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Add flags markup to some helpers
Richard Henderson [Tue, 25 Aug 2020 14:40:14 +0000 (07:40 -0700)] 
target/microblaze: Add flags markup to some helpers

The mmu_read, mmu_write, get, and put helpers do not touch the
general registers, or any of the other variables managed by tcg.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Remove cpu_R[0]
Richard Henderson [Tue, 25 Aug 2020 03:30:51 +0000 (20:30 -0700)] 
target/microblaze: Remove cpu_R[0]

Do not initialize cpu_R[0], as this should be totally unused.
The cpu_for_read and cpu_for_write functions use a local temp.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Remove last of old decoder
Richard Henderson [Tue, 25 Aug 2020 03:18:17 +0000 (20:18 -0700)] 
target/microblaze: Remove last of old decoder

All instructions have been convered.  Issue sigill if decodetree
does not match.  Remove argument decode from DisasContext.
Remove microblaze-decode.h.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Convert dec_stream to decodetree
Richard Henderson [Tue, 25 Aug 2020 03:13:45 +0000 (20:13 -0700)] 
target/microblaze: Convert dec_stream to decodetree

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Convert dec_msr to decodetree
Richard Henderson [Tue, 25 Aug 2020 02:59:57 +0000 (19:59 -0700)] 
target/microblaze: Convert dec_msr to decodetree

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Convert msrclr, msrset to decodetree
Richard Henderson [Tue, 25 Aug 2020 02:05:32 +0000 (19:05 -0700)] 
target/microblaze: Convert msrclr, msrset to decodetree

Split this out of dec_msr.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Tidy do_rti, do_rtb, do_rte
Richard Henderson [Tue, 25 Aug 2020 01:34:06 +0000 (18:34 -0700)] 
target/microblaze: Tidy do_rti, do_rtb, do_rte

Since cpu_msr is no longer a 64-bit quantity, we can simplify
the arithmetic in these functions.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Convert dec_rts to decodetree
Richard Henderson [Tue, 25 Aug 2020 01:25:25 +0000 (18:25 -0700)] 
target/microblaze: Convert dec_rts to decodetree

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Convert dec_bcc to decodetree
Richard Henderson [Tue, 25 Aug 2020 01:05:41 +0000 (18:05 -0700)] 
target/microblaze: Convert dec_bcc to decodetree

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Convert dec_br to decodetree
Richard Henderson [Tue, 25 Aug 2020 00:38:04 +0000 (17:38 -0700)] 
target/microblaze: Convert dec_br to decodetree

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Reorganize branching
Richard Henderson [Mon, 24 Aug 2020 16:58:14 +0000 (09:58 -0700)] 
target/microblaze: Reorganize branching

Remove the btaken variable, and simplify things by always computing
the full branch destination into btarget.  This avoids all need for
sync_jmpstate().

Retain the direct branch behaviour by remembering the jump destination
in jmp_dest, discarding btarget.  In the normal case, where the branch
delay slot cannot trap (e.g. arithmetic), tcg will remove the computation
into btarget, leaving us with just the tcg direct branching at the end.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Convert mbar to decodetree
Richard Henderson [Sun, 23 Aug 2020 16:38:15 +0000 (09:38 -0700)] 
target/microblaze: Convert mbar to decodetree

Split this out of the normal branch instructions,
as it requires special handling.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Convert brk and brki to decodetree
Richard Henderson [Sun, 23 Aug 2020 16:17:22 +0000 (09:17 -0700)] 
target/microblaze: Convert brk and brki to decodetree

Split these out of the normal branch instructions, as they require
special handling.  Perform the entire operation inline, instead of
raising EXCP_BREAK to do the work in mb_cpu_do_interrupt.

This fixes a bug in that brki rd, imm, for imm != 0x18 is not
supposed to set MSR_BIP.  This fixes a bug in that imm == 0 is
the reset vector and 0x18 is the debug vector, and neither should
raise a tcg exception in system mode.

Introduce EXCP_SYSCALL for microblaze-linux-user.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Tidy mb_cpu_dump_state
Richard Henderson [Sat, 22 Aug 2020 23:14:46 +0000 (16:14 -0700)] 
target/microblaze: Tidy mb_cpu_dump_state

Using lookup_symbol is quite slow; remove that.  Decode the
various bits of iflags; only show imm, btaken, btarget when
they are relevant to iflags.  Improve formatting.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Replace delayed_branch with tb_flags_to_set
Richard Henderson [Sat, 22 Aug 2020 15:25:39 +0000 (08:25 -0700)] 
target/microblaze: Replace delayed_branch with tb_flags_to_set

The multi-stage counter can be replaced by clearing D_FLAG,
the or'ing in tb_flags_to_set.  The jump then happens when
D_FLAG is finally cleared.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Replace clear_imm with tb_flags_to_set
Richard Henderson [Sat, 22 Aug 2020 14:57:03 +0000 (07:57 -0700)] 
target/microblaze: Replace clear_imm with tb_flags_to_set

This more general update variable will be able to handle
delay slots as well.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Use cc->do_unaligned_access
Richard Henderson [Fri, 21 Aug 2020 03:29:01 +0000 (20:29 -0700)] 
target/microblaze: Use cc->do_unaligned_access

This fixes the problem in which unaligned stores succeeded,
but then we raised the exception after modifying memory.
Store the ESS for the unaligned data access in the iflags
for the insn, so that it can be found during unwind.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotcg: Add tcg_get_insn_start_param
Richard Henderson [Fri, 21 Aug 2020 02:27:53 +0000 (19:27 -0700)] 
tcg: Add tcg_get_insn_start_param

MicroBlaze will shortly need to update a parameter in place.
Add an interface to read to match that for write.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Store "current" iflags in insn_start
Richard Henderson [Thu, 20 Aug 2020 15:44:20 +0000 (08:44 -0700)] 
target/microblaze: Store "current" iflags in insn_start

This data is available during exception unwinding, thus
we can restore it from there directly, rather than saving
it during the TB.  Thus we may remove the t_sync_flags()
calls in the load/store operations.

Note that these calls were missing from the other places
where runtime exceptions may be raised, such as idiv and
the floating point operations.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Fix no-op mb_cpu_transaction_failed
Richard Henderson [Thu, 27 Aug 2020 22:01:30 +0000 (15:01 -0700)] 
target/microblaze: Fix no-op mb_cpu_transaction_failed

Do not call cpu_restore_state when no exception will be
delivered.  This can lead to inconsistent cpu state.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reported-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Move bimm to BIMM_FLAG
Richard Henderson [Thu, 20 Aug 2020 15:08:19 +0000 (08:08 -0700)] 
target/microblaze: Move bimm to BIMM_FLAG

It makes sense to keep BIMM with D_FLAG, as they can be written
back to iflags at the same time.  BIMM_FLAG does not need to be
added to IFLAGS_TB_MASK because it does not affect the next TB,
only the exception path out of the current TB.  Renumber IMM_FLAG,
as the value 4 holds no particular significance; pack these two
flags at the bottom of the bitfield.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Assert no overlap in flags making up tb_flags
Richard Henderson [Thu, 20 Aug 2020 15:01:52 +0000 (08:01 -0700)] 
target/microblaze: Assert no overlap in flags making up tb_flags

Create MSR_TB_MASK.  Use it in cpu_get_tb_cpu_state, and check
that IFLAGS_TB_MASK does not overlap.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Convert dec_load and dec_store to decodetree
Richard Henderson [Thu, 20 Aug 2020 00:38:44 +0000 (17:38 -0700)] 
target/microblaze: Convert dec_load and dec_store to decodetree

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Fix cpu unwind for stackprot
Richard Henderson [Tue, 25 Aug 2020 14:45:34 +0000 (07:45 -0700)] 
target/microblaze: Fix cpu unwind for stackprot

Restore the correct PC when an exception must be raised.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Cache mem_index in DisasContext
Richard Henderson [Wed, 19 Aug 2020 23:38:07 +0000 (16:38 -0700)] 
target/microblaze: Cache mem_index in DisasContext

Ideally, nothing outside the top-level of translation even
has access to env.  Cache the value in init_disas_context.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Replace MSR_EE_FLAG with MSR_EE
Richard Henderson [Wed, 19 Aug 2020 23:12:12 +0000 (16:12 -0700)] 
target/microblaze: Replace MSR_EE_FLAG with MSR_EE

There's no reason to define MSR_EE_FLAG; we can just use the
original MSR_EE define.  Document the other flags copied into
tb_flags with iflag to reserve those bits.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Mark fpu helpers TCG_CALL_NO_WG
Richard Henderson [Mon, 24 Aug 2020 15:57:36 +0000 (08:57 -0700)] 
target/microblaze: Mark fpu helpers TCG_CALL_NO_WG

Now that FSR is no longer a tcg global temp, we can say that
the fpu helpers do not write to tcg temps.  All temps are
read implicitly by the fpu exception path.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Fix cpu unwind for fpu exceptions
Richard Henderson [Wed, 19 Aug 2020 16:11:37 +0000 (09:11 -0700)] 
target/microblaze: Fix cpu unwind for fpu exceptions

Restore the correct PC when an exception must be raised.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Convert dec_fpu to decodetree
Richard Henderson [Wed, 19 Aug 2020 16:04:09 +0000 (09:04 -0700)] 
target/microblaze: Convert dec_fpu to decodetree

The current dec_check_fpuv2 test, raising an FPU exception for
an unimplemented instruction, appears to be contradictory to
the manual.  Drop that and merely check use_fpu == 2.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Convert dec_imm to decodetree
Richard Henderson [Tue, 18 Aug 2020 17:22:18 +0000 (10:22 -0700)] 
target/microblaze: Convert dec_imm to decodetree

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Convert dec_barrel to decodetree
Richard Henderson [Tue, 18 Aug 2020 15:47:38 +0000 (08:47 -0700)] 
target/microblaze: Convert dec_barrel to decodetree

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Convert dec_bit to decodetree
Richard Henderson [Tue, 18 Aug 2020 15:13:35 +0000 (08:13 -0700)] 
target/microblaze: Convert dec_bit to decodetree

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Unwind properly when raising divide-by-zero
Richard Henderson [Tue, 18 Aug 2020 06:12:14 +0000 (23:12 -0700)] 
target/microblaze: Unwind properly when raising divide-by-zero

Restore the correct pc when raising divide-by-zero.  Also, the
MSR[DZO] bit is sticky -- it is not cleared with a successful divide.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Convert dec_div to decodetree
Richard Henderson [Tue, 18 Aug 2020 06:03:10 +0000 (23:03 -0700)] 
target/microblaze: Convert dec_div to decodetree

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Convert dec_mul to decodetree
Richard Henderson [Tue, 18 Aug 2020 05:49:20 +0000 (22:49 -0700)] 
target/microblaze: Convert dec_mul to decodetree

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Convert dec_and, dec_or, dec_xor to decodetree
Richard Henderson [Mon, 17 Aug 2020 22:12:55 +0000 (15:12 -0700)] 
target/microblaze: Convert dec_and, dec_or, dec_xor to decodetree

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Convert dec_pattern to decodetree
Richard Henderson [Mon, 17 Aug 2020 21:19:33 +0000 (14:19 -0700)] 
target/microblaze: Convert dec_pattern to decodetree

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Implement cmp and cmpu inline
Richard Henderson [Tue, 25 Aug 2020 14:31:29 +0000 (07:31 -0700)] 
target/microblaze: Implement cmp and cmpu inline

These are simple enough operations; we do not need to
call an out-of-line helper.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Convert dec_sub to decodetree
Richard Henderson [Mon, 17 Aug 2020 18:29:24 +0000 (11:29 -0700)] 
target/microblaze: Convert dec_sub to decodetree

Use tcg_gen_add2_i32 for computing carry.
This removes the last use of helper_carry, so remove that.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Convert dec_add to decodetree
Richard Henderson [Tue, 18 Aug 2020 05:17:58 +0000 (22:17 -0700)] 
target/microblaze: Convert dec_add to decodetree

Adds infrastrucure for translation of instructions, which could
not be added before their first use.  Cache a temporary which
represents r0 as the immediate 0 value, or a sink.

Move the special case of opcode_0_illegal from old_decode()
into decodetree as well, lest this get interpreted as add.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Add decodetree infrastructure
Richard Henderson [Mon, 17 Aug 2020 16:42:44 +0000 (09:42 -0700)] 
target/microblaze: Add decodetree infrastructure

The new interface is a stub that recognizes no instructions.
It falls back to the old decoder for all instructions.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Ensure imm constant is always available
Richard Henderson [Tue, 18 Aug 2020 04:52:15 +0000 (21:52 -0700)] 
target/microblaze: Ensure imm constant is always available

Include the env->imm value in the TB values when IMM_FLAG is set.
This means that we can always reconstruct the complete 32-bit imm.
Discard env_imm when its contents can no longer be accessed.

Fix user-mode checks for BRK/BRKI, which depend on IMM.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Remove LOG_DIS
Richard Henderson [Tue, 18 Aug 2020 04:08:40 +0000 (21:08 -0700)] 
target/microblaze: Remove LOG_DIS

Also remove the related defines, DISAS_MB and DEBUG_DISAS.
Rely on print_insn_microblaze.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Remove empty D macros
Richard Henderson [Tue, 18 Aug 2020 04:01:30 +0000 (21:01 -0700)] 
target/microblaze: Remove empty D macros

This is never used in op_helper.c and translate.c.  There are
two trivial uses in helper.c which can be improved by always
logging MMU_EXCP to CPU_LOG_INT.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Remove DISAS_GNU
Richard Henderson [Tue, 18 Aug 2020 03:59:47 +0000 (20:59 -0700)] 
target/microblaze: Remove DISAS_GNU

This is never used.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Remove SIM_COMPAT
Richard Henderson [Tue, 18 Aug 2020 03:58:58 +0000 (20:58 -0700)] 
target/microblaze: Remove SIM_COMPAT

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Convert to translator_loop
Richard Henderson [Tue, 18 Aug 2020 03:56:05 +0000 (20:56 -0700)] 
target/microblaze: Convert to translator_loop

Finish the conversion to the generic translator_loop.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Convert to DisasContextBase
Richard Henderson [Mon, 17 Aug 2020 22:50:21 +0000 (15:50 -0700)] 
target/microblaze: Convert to DisasContextBase

Part one of conversion to the generic translator_loop is to
use the DisasContextBase and the members therein.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Check singlestep_enabled in gen_goto_tb
Richard Henderson [Tue, 18 Aug 2020 03:12:21 +0000 (20:12 -0700)] 
target/microblaze: Check singlestep_enabled in gen_goto_tb

Do not use goto_tb if we're single-stepping.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Use DISAS_NORETURN
Richard Henderson [Mon, 17 Aug 2020 23:53:08 +0000 (16:53 -0700)] 
target/microblaze: Use DISAS_NORETURN

Both exceptions and gen_goto_tb do not return.  Use the
official DISAS_NORETURN enumerator for this case.
This eliminates all use of DISAS_TB_JUMP.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Split out MSR[C] to its own variable
Richard Henderson [Tue, 18 Aug 2020 18:58:23 +0000 (11:58 -0700)] 
target/microblaze: Split out MSR[C] to its own variable

Having the MSR[C] bit separate will improve arithmetic that operates
on the carry bit.  Having mb_cpu_read_msr() populate MSR[CC] will
prevent the carry copy not matching the carry bit.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Tidy mb_tcg_init
Richard Henderson [Tue, 25 Aug 2020 13:29:47 +0000 (06:29 -0700)] 
target/microblaze: Tidy mb_tcg_init

All of the tcg globals can be recorded in the same table.
Drop the "r" prefix from "rpc" and "rmsr".  Obviates the
need for regnames[], which was incorrectly not const.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Rename env_* tcg variables to cpu_*
Richard Henderson [Mon, 24 Aug 2020 13:47:54 +0000 (06:47 -0700)] 
target/microblaze: Rename env_* tcg variables to cpu_*

This is cpu_imm, cpu_btaken, cpu_iflags, cpu_res_addr and cpu_res_val.
It is standard for these file-scope globals to begin with cpu_*.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Remove helper_debug and env->debug
Richard Henderson [Mon, 24 Aug 2020 13:46:04 +0000 (06:46 -0700)] 
target/microblaze: Remove helper_debug and env->debug

This is not used, and seems redundant with -d cpu.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Mark raise_exception as noreturn
Richard Henderson [Tue, 25 Aug 2020 14:35:19 +0000 (07:35 -0700)] 
target/microblaze: Mark raise_exception as noreturn

This will allow tcg to remove any dead code that might
follow an exception.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Tidy raising of exceptions
Richard Henderson [Fri, 21 Aug 2020 03:49:18 +0000 (20:49 -0700)] 
target/microblaze: Tidy raising of exceptions

Split out gen_raise_exception which does no cpu state sync.
Rename t_gen_raise_exception to gen_raise_exception_sync to
emphasize that it does a sync.  Create gen_raise_hw_excp to
simplify code raising EXCP_HW_EXCP.

Since there is now only one use of cpu_esr, perform a store
instead and remove the TCG variable.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Remove cpu_ear
Richard Henderson [Thu, 20 Aug 2020 05:54:53 +0000 (22:54 -0700)] 
target/microblaze: Remove cpu_ear

Since cpu_ear is only used during MSR and MTR instructions,
we can just as easily use an explicit load and store, so
eliminate the variable.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Fix width of EDR
Richard Henderson [Thu, 20 Aug 2020 05:48:18 +0000 (22:48 -0700)] 
target/microblaze: Fix width of EDR

The exception data register is only 32-bits wide.  Do not use a
64-bit type to represent it.  Since cpu_edr is only used during
MSR and MTR instructions, we can just as easily use an explicit
load and store, so eliminate the variable.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Fix width of BTR
Richard Henderson [Thu, 20 Aug 2020 05:44:49 +0000 (22:44 -0700)] 
target/microblaze: Fix width of BTR

The branch target register is only 32-bits wide.  Do not use a
64-bit type to represent it.  Since cpu_btr is only used during
MSR and MTR instructions, we can just as easily use an explicit
load and store, so eliminate the variable.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Fix width of FSR
Richard Henderson [Thu, 20 Aug 2020 05:40:23 +0000 (22:40 -0700)] 
target/microblaze: Fix width of FSR

The exception status register is only 32-bits wide.  Do not use a
64-bit type to represent it.  Since cpu_fsr is only used during
MSR and MTR instructions, we can just as easily use an explicit
load and store, so eliminate the variable.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Fix width of ESR
Richard Henderson [Thu, 20 Aug 2020 05:37:40 +0000 (22:37 -0700)] 
target/microblaze: Fix width of ESR

The exception status register is only 32-bits wide.
Do not use a 64-bit type to represent it.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Fix width of MSR
Richard Henderson [Thu, 20 Aug 2020 05:33:37 +0000 (22:33 -0700)] 
target/microblaze: Fix width of MSR

The machine status register is only 32-bits wide.
Do not use a 64-bit type to represent it.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Fix width of PC and BTARGET
Richard Henderson [Thu, 20 Aug 2020 05:25:16 +0000 (22:25 -0700)] 
target/microblaze: Fix width of PC and BTARGET

The program counter is only 32-bits wide.  Do not use a 64-bit
type to represent it.  Since they are so closely related, fix
btarget at the same time.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Split the cpu_SR array
Richard Henderson [Thu, 20 Aug 2020 05:12:42 +0000 (22:12 -0700)] 
target/microblaze: Split the cpu_SR array

Similar to splitting the sregs array, this will allow further
fixes and cleanups.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Split out EDR from env->sregs
Richard Henderson [Thu, 20 Aug 2020 05:05:29 +0000 (22:05 -0700)] 
target/microblaze: Split out EDR from env->sregs

Finish eliminating the sregs array in favor of individual members.
Does not correct the width of EDR, yet.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Split out BTR from env->sregs
Richard Henderson [Thu, 20 Aug 2020 04:58:40 +0000 (21:58 -0700)] 
target/microblaze: Split out BTR from env->sregs

Continue eliminating the sregs array in favor of individual members.
Does not correct the width of BTR, yet.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Split out FSR from env->sregs
Richard Henderson [Thu, 20 Aug 2020 04:54:38 +0000 (21:54 -0700)] 
target/microblaze: Split out FSR from env->sregs

Continue eliminating the sregs array in favor of individual members.
Does not correct the width of FSR, yet.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Split out ESR from env->sregs
Richard Henderson [Thu, 20 Aug 2020 04:50:35 +0000 (21:50 -0700)] 
target/microblaze: Split out ESR from env->sregs

Continue eliminating the sregs array in favor of individual members.
Does not correct the width of ESR, yet.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9 months agotarget/microblaze: Split out EAR from env->sregs
Richard Henderson [Thu, 20 Aug 2020 04:46:10 +0000 (21:46 -0700)] 
target/microblaze: Split out EAR from env->sregs

Continue eliminating the sregs array in favor of individual members.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>