qemu.git
2 years agos390x/cpumodel: Add the z15 name to the description of gen15a
Christian Borntraeger [Wed, 18 Sep 2019 14:42:14 +0000 (16:42 +0200)] 
s390x/cpumodel: Add the z15 name to the description of gen15a

We now know that gen15a is called z15.

Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2 years agos390x/kvm: Officially require at least kernel 3.15
Thomas Huth [Fri, 13 Sep 2019 09:14:43 +0000 (11:14 +0200)] 
s390x/kvm: Officially require at least kernel 3.15

Since QEMU v2.10, the KVM acceleration does not work on older kernels
anymore since the code accidentally requires the KVM_CAP_DEVICE_CTRL
capability now - it should have been optional instead.
Instead of fixing the bug, we asked in the ChangeLog of QEMU 2.11 - 3.0
that people should speak up if they still need support of QEMU running
with KVM on older kernels, but seems like nobody really complained.
Thus let's make this official now and turn it into a proper error
message, telling the users to use at least kernel 3.15 now.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20190913091443.27565-1-thuth@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2 years agoMerge tag 's390-ccw-bios-2019-09-18' of https://gitlab.com/huth/qemu into s390-next
Christian Borntraeger [Mon, 23 Sep 2019 07:12:39 +0000 (09:12 +0200)] 
Merge tag 's390-ccw-bios-2019-09-18' of https://gitlab.com/huth/qemu into s390-next

Small fixes for the s390-ccw firmware

2 years agoMerge remote-tracking branch 'remotes/cleber/tags/python-next-pull-request' into...
Peter Maydell [Fri, 20 Sep 2019 16:28:42 +0000 (17:28 +0100)] 
Merge remote-tracking branch 'remotes/cleber/tags/python-next-pull-request' into staging

Python (acceptance tests) queue, 2019-09-19

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* remotes/cleber/tags/python-next-pull-request:
  BootLinuxSshTest: Only run the tests when explicitly requested
  tests/acceptance: Specify arch for QueryCPUModelExpansion

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 years agoMerge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-request' into...
Peter Maydell [Fri, 20 Sep 2019 12:58:04 +0000 (13:58 +0100)] 
Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-request' into staging

Trivial patches 20190919

# gpg: Signature made Thu 19 Sep 2019 14:50:55 BST
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# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/trivial-branch-pull-request:
  configure: Add xkbcommon configure options
  kvm: Fix typo in header of kvm_device_access()
  Fix cacheline detection on FreeBSD/powerpc.
  build: Don't ignore qapi-visit-core.c
  target/m68k/fpu_helper.c: rename the access arguments
  Replace '-machine accel=xyz' with '-accel xyz'
  cutils: Move size_to_str() from "qemu-common.h" to "qemu/cutils.h"
  vfio: fix a typo

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 years agoMakefile: Fix in-tree builds when Sphinx is available
Peter Maydell [Thu, 19 Sep 2019 15:59:57 +0000 (16:59 +0100)] 
Makefile: Fix in-tree builds when Sphinx is available

In commit 27a296fce9821e we switched the qemu-ga manpage over to
being built from Sphinx.  The makefile rules for this were correct
for an out-of-tree build, but break for in-tree builds if Sphinx is
present and we're trying to build the documentation.

Specifically, because Sphinx refuses to build output files into
the same directory as its sources, for an in-tree build we tell
it to build into a subdirectory docs/built, and set up a makefile
variable MANUAL_BUILDDIR indicating where the docs are going.
The makefile rule telling Make how to build qemu-ga.8 correctly
used this variable, but the lines adding qemu-ga.8 to the list
of DOCS to be built and the 'make install' rune did not. The
effect was that for an in-tree build we told Make to build
'docs/interop/qemu-ga.8' but did not provide a specific rule for
doing so, which caused Make to fall back to the old rules.make
rule for building any "%.8" file. Make tried to invoke texi2pod
with a bogus command line, resulting in the error:

  GEN     docs/interop/qemu-ga.8
No filename or title
make: *** [rules.mak:394: docs/interop/qemu-ga.8]

Fix this by using $(MANUAL_BUILDDIR) when constructing the
list of DOCS files we want to build and also in the source
file name we install for 'make install'.

(Among other things, this broke the Shippable CI builds.)

Fixes: 27a296fce9821e
Reported-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20190919155957.12618-1-peter.maydell@linaro.org
Tested-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
2 years agoMerge remote-tracking branch 'remotes/kraxel/tags/ui-20190919-pull-request' into...
Peter Maydell [Thu, 19 Sep 2019 16:16:07 +0000 (17:16 +0100)] 
Merge remote-tracking branch 'remotes/kraxel/tags/ui-20190919-pull-request' into staging

ui: add barrier client.
ui: bugfixes for vnc & egl.

# gpg: Signature made Thu 19 Sep 2019 08:09:05 BST
# gpg:                using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* remotes/kraxel/tags/ui-20190919-pull-request:
  vnc: fix memory leak when vnc disconnect
  ui: add an embedded Barrier client
  vnc: fix websocket field in events
  ui/egl: fix framebuffer reads

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 years agoMerge remote-tracking branch 'remotes/kraxel/tags/ati-20190919-pull-request' into...
Peter Maydell [Thu, 19 Sep 2019 15:15:57 +0000 (16:15 +0100)] 
Merge remote-tracking branch 'remotes/kraxel/tags/ati-20190919-pull-request' into staging

vga: fix cursor code in ati-vga.

# gpg: Signature made Thu 19 Sep 2019 10:10:32 BST
# gpg:                using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* remotes/kraxel/tags/ati-20190919-pull-request:
  ati: use vga_read_byte in ati_cursor_define
  vga: move access helpers to separate include file

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 years agoBootLinuxSshTest: Only run the tests when explicitly requested
Philippe Mathieu-Daudé [Wed, 18 Sep 2019 12:27:48 +0000 (14:27 +0200)] 
BootLinuxSshTest: Only run the tests when explicitly requested

Currently the Avocado framework does not distinct the time spent
downloading assets vs. the time spent running a test. With big
assets (like a full VM image) the tests likely fail.

This is a limitation known by the Avocado team.
Until this issue get fixed, do not run this tests automatically.

Tests can still be run setting the AVOCADO_TIMEOUT_EXPECTED
environment variable.

Reported-by: Gerd Hoffmann <kraxel@redhat.com>
Reported-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Cleber Rosa <crosa@redhat.com>
Message-Id: <20190918122748.2144-1-philmd@redhat.com>
Signed-off-by: Cleber Rosa <crosa@redhat.com>
2 years agoconfigure: Add xkbcommon configure options
James Le Cuirot [Sat, 14 Sep 2019 14:51:55 +0000 (15:51 +0100)] 
configure: Add xkbcommon configure options

This dependency is currently "automagic", which is bad for distributions.

Signed-off-by: James Le Cuirot <chewi@gentoo.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Message-Id: <20190914145155.19360-1-chewi@gentoo.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agokvm: Fix typo in header of kvm_device_access()
Greg Kurz [Thu, 12 Sep 2019 13:57:26 +0000 (15:57 +0200)] 
kvm: Fix typo in header of kvm_device_access()

Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <156829664683.2070256.13400788010568373502.stgit@bahia.tls.ibm.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agoFix cacheline detection on FreeBSD/powerpc.
Justin Hibbits [Wed, 21 Aug 2019 08:25:46 +0000 (10:25 +0200)] 
Fix cacheline detection on FreeBSD/powerpc.

machdep.cacheline_size is an integer, not a long.  Since PowerPC is
big-endian this causes sysctlbyname() to fill in the upper bits of the
argument, rather than the correct 'lower bits' of the word.  Specify the
correct type to fix this.

Fixes: b255b2c8a548 ("util: add cacheinfo")
Signed-off-by: Justin Hibbits <chmeeedalf@gmail.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Tested-by: Justin Hibbits <chmeeedalf@gmail.com>
Message-Id: <20190821082546.5252-2-laurent@vivier.eu>

2 years agoMerge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request' into staging
Peter Maydell [Thu, 19 Sep 2019 12:27:11 +0000 (13:27 +0100)] 
Merge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request' into staging

Pull request

# gpg: Signature made Wed 18 Sep 2019 14:17:59 BST
# gpg:                using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [full]
# gpg:                 aka "Stefan Hajnoczi <stefanha@gmail.com>" [full]
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35  775A 9CA4 ABB3 81AB 73C8

* remotes/stefanha/tags/tracing-pull-request:
  trace: Forbid event format ending with newline character
  trace: Remove trailing newline in events
  loader: Trace loaded images

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 years agoMerge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-4.2-sf1-v3' into...
Peter Maydell [Thu, 19 Sep 2019 10:14:28 +0000 (11:14 +0100)] 
Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-4.2-sf1-v3' into staging

RISC-V Patches for the 4.2 Soft Freeze, Part 1, v3

This contains quite a few patches that I'd like to target for 4.2.
They're mostly emulation fixes for the sifive_u board, which now much
more closely matches the hardware and can therefor run the same fireware
as what gets loaded onto the board.  Additional user-visible
improvements include:

* support for loading initrd files from the command line into Linux, via
  /chosen/linux,initrd-{start,end} device tree nodes.
* The conversion of LOG_TRACE to trace events.
* The addition of clock DT nodes for our uart and ethernet.

This also includes some preliminary work for the H extension patches,
but does not include the H extension patches as I haven't had time to
review them yet.

This passes my OE boot test on 32-bit and 64-bit virt machines, as well
as a 64-bit upstream Linux boot on the sifive_u machine.  It has been
fixed to actually pass "make check" this time.

Changes since v2 (never made it to the list):

* Sets the sifive_u machine default core count to 2 instead of 5.

Changes since v1 <20190910190513.21160-1-palmer@sifive.com>:

* Sets the sifive_u machine default core count to 5 instead of 1, as
  it's impossible to have a single core sifive_u machine.

# gpg: Signature made Tue 17 Sep 2019 16:43:30 BST
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# gpg:                issuer "palmer@dabbelt.com"
# gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>" [unknown]
# gpg:                 aka "Palmer Dabbelt <palmer@sifive.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 00CE 76D1 8349 60DF CE88  6DF8 EF4C A150 2CCB AB41

* remotes/palmer/tags/riscv-for-master-4.2-sf1-v3: (48 commits)
  gdbstub: riscv: fix the fflags registers
  target/riscv: Use TB_FLAGS_MSTATUS_FS for floating point
  target/riscv: Fix mstatus dirty mask
  target/riscv: Use both register name and ABI name
  riscv: sifive_u: Update model and compatible strings in device tree
  riscv: sifive_u: Remove handcrafted clock nodes for UART and ethernet
  riscv: sifive_u: Fix broken GEM support
  riscv: sifive_u: Instantiate OTP memory with a serial number
  riscv: sifive: Implement a model for SiFive FU540 OTP
  riscv: roms: Update default bios for sifive_u machine
  riscv: sifive_u: Change UART node name in device tree
  riscv: sifive_u: Update UART base addresses and IRQs
  riscv: sifive_u: Reference PRCI clocks in UART and ethernet nodes
  riscv: sifive_u: Add PRCI block to the SoC
  riscv: sifive_u: Generate hfclk and rtcclk nodes
  riscv: sifive: Implement PRCI model for FU540
  riscv: sifive_u: Update PLIC hart topology configuration string
  riscv: sifive_u: Update hart configuration to reflect the real FU540 SoC
  riscv: sifive_u: Set the minimum number of cpus to 2
  riscv: hart: Add a "hartid-base" property to RISC-V hart array
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 years agobuild: Don't ignore qapi-visit-core.c
Eric Blake [Thu, 12 Sep 2019 18:46:07 +0000 (13:46 -0500)] 
build: Don't ignore qapi-visit-core.c

This file is version-controlled, and not generated from a .json file.

Fixes: bf582c3461b
Reported-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190912184607.3507-1-eblake@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agotarget/m68k/fpu_helper.c: rename the access arguments
KONRAD Frederic [Thu, 12 Sep 2019 14:02:00 +0000 (16:02 +0200)] 
target/m68k/fpu_helper.c: rename the access arguments

The "access" arguments clash with a macro under Windows with MinGW:
  CC      m68k-softmmu/target/m68k/fpu_helper.o
  target/m68k/fpu_helper.c: In function 'fmovem_predec':
  target/m68k/fpu_helper.c:405:56: error: macro "access" passed 4 arguments,
   but takes just 2
               size = access(env, addr, &env->fregs[i], ra);

So this renames them access_fn.

Tested with:
 ./configure --target-list=m68k-softmmu
 make -j8

Signed-off-by: KONRAD Frederic <frederic.konrad@adacore.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <1568296920-29939-1-git-send-email-frederic.konrad@adacore.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agoReplace '-machine accel=xyz' with '-accel xyz'
Thomas Huth [Wed, 4 Sep 2019 05:27:39 +0000 (07:27 +0200)] 
Replace '-machine accel=xyz' with '-accel xyz'

We've got a separate option to configure the accelerator nowadays, which
is shorter to type and the preferred way of specifying an accelerator.
Use it in the source and examples to show that it is the favored option.
(However, do not touch the places yet which also specify other machine
options or multiple accelerators - these are currently still better
handled with one single "-machine" statement instead)

Signed-off-by: Thomas Huth <thuth@redhat.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20190904052739.22123-1-thuth@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agocutils: Move size_to_str() from "qemu-common.h" to "qemu/cutils.h"
Philippe Mathieu-Daudé [Tue, 3 Sep 2019 12:05:55 +0000 (14:05 +0200)] 
cutils: Move size_to_str() from "qemu-common.h" to "qemu/cutils.h"

"qemu/cutils.h" contains various qemu_strtosz_*() functions
useful to convert strings to size. It seems natural to have
the opposite usage (from size to string) there too.

The function definition is already in util/cutils.c.

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: John Snow <jsnow@redhat.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Message-Id: <20190903120555.7551-1-philmd@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agovfio: fix a typo
Chen Zhang [Thu, 22 Aug 2019 06:49:09 +0000 (14:49 +0800)] 
vfio: fix a typo

Signed-off-by: Chen Zhang <tgfbeta@me.com>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <8E5A9C27-C76D-46CF-85B0-79121A00B05F@me.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agoati: use vga_read_byte in ati_cursor_define
Gerd Hoffmann [Tue, 17 Sep 2019 11:14:41 +0000 (13:14 +0200)] 
ati: use vga_read_byte in ati_cursor_define

This makes sure reads are confined to vga video memory.

v3: use uint32_t, fix cut+paste bug.
v2: fix ati_cursor_draw_line too.

Reported-by: xu hang <flier_m@outlook.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190917111441.27405-3-kraxel@redhat.com

2 years agovga: move access helpers to separate include file
Gerd Hoffmann [Tue, 17 Sep 2019 11:14:40 +0000 (13:14 +0200)] 
vga: move access helpers to separate include file

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190917111441.27405-2-kraxel@redhat.com

2 years agotests/acceptance: Specify arch for QueryCPUModelExpansion
David Gibson [Wed, 18 Sep 2019 07:06:54 +0000 (17:06 +1000)] 
tests/acceptance: Specify arch for QueryCPUModelExpansion

At the moment this test runs on whatever the host arch is.  But it looks
for 'unavailable-features' which is an x86 specific cpu property.  Tag it
to always use qemu-system-x86_64.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Cleber Rosa <crosa@redhat.com>
Message-Id: <20190918070654.19356-1-david@gibson.dropbear.id.au>
Signed-off-by: Cleber Rosa <crosa@redhat.com>
2 years agopc-bios/s390-ccw: Rebuild the s390-netboot.img firmware image
Thomas Huth [Wed, 18 Sep 2019 15:46:02 +0000 (17:46 +0200)] 
pc-bios/s390-ccw: Rebuild the s390-netboot.img firmware image

The new image now contains the "pc-bios/s390-ccw/net: fix a possible
memory leak in get_uuid()" patch.

Signed-off-by: Thomas Huth <thuth@redhat.com>
2 years agopc-bios/s390-ccw/net: fix a possible memory leak in get_uuid()
Yifan Luo [Wed, 14 Aug 2019 06:14:26 +0000 (14:14 +0800)] 
pc-bios/s390-ccw/net: fix a possible memory leak in get_uuid()

There is a possible memory leak in get_uuid(). Should free allocated mem
before
return NULL.

Signed-off-by: Yifan Luo <luoyifan@cmss.chinamobile.com>
Message-Id: <02cf01d55267$86cf2850$946d78f0$@cmss.chinamobile.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2 years agopc-bios/s390-ccw: Do not pre-initialize empty array
Thomas Huth [Wed, 28 Aug 2019 12:25:55 +0000 (14:25 +0200)] 
pc-bios/s390-ccw: Do not pre-initialize empty array

Since commit 339686a358b11a231aa5b6d1424e7a1460d7f277 ("pc-bios/s390-ccw:
zero out bss section"), we are clearing now the BSS in start.S, so there
is no need to pre-initialize the loadparm_str array with zeroes anymore.

Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2 years agotrace: Forbid event format ending with newline character
Philippe Mathieu-Daudé [Mon, 16 Sep 2019 09:51:21 +0000 (11:51 +0200)] 
trace: Forbid event format ending with newline character

Event format ending with newlines confuse the trace reports.
Forbid them.

Add a check to refuse new format added with trailing newline:

  $ make
  [...]
    GEN     hw/misc/trace.h
  Traceback (most recent call last):
    File "scripts/tracetool.py", line 152, in <module>
      main(sys.argv)
    File "scripts/tracetool.py", line 143, in main
      events.extend(tracetool.read_events(fh, arg))
    File "scripts/tracetool/__init__.py", line 367, in read_events
      event = Event.build(line)
    File "scripts/tracetool/__init__.py", line 281, in build
      raise ValueError("Event format can not end with a newline character")
  ValueError: Error at hw/misc/trace-events:121: Event format can not end with a newline character

Reviewed-by: John Snow <jsnow@redhat.com>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190916095121.29506-3-philmd@redhat.com
Message-Id: <20190916095121.29506-3-philmd@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2 years agotrace: Remove trailing newline in events
Philippe Mathieu-Daudé [Mon, 16 Sep 2019 09:51:20 +0000 (11:51 +0200)] 
trace: Remove trailing newline in events

While the tracing framework does not forbid trailing newline in
events format string, using them lead to confuse output.
It is the responsibility of the backend to properly end an event
line.

Some of our formats have trailing newlines, remove them.

[Fixed typo in commit description reported by Eric Blake
<eblake@redhat.com>
--Stefan]

Reviewed-by: John Snow <jsnow@redhat.com>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190916095121.29506-2-philmd@redhat.com
Message-Id: <20190916095121.29506-2-philmd@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2 years agoloader: Trace loaded images
Alexey Kardashevskiy [Thu, 13 Jun 2019 05:09:37 +0000 (15:09 +1000)] 
loader: Trace loaded images

This adds a trace point which prints every loaded image. This includes
bios/firmware/kernel/initradmdisk/pcirom.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190613050937.124903-1-aik@ozlabs.ru>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2 years agogdbstub: riscv: fix the fflags registers
KONRAD Frederic [Tue, 10 Sep 2019 08:15:41 +0000 (10:15 +0200)] 
gdbstub: riscv: fix the fflags registers

While debugging an application with GDB the following might happen:

(gdb) return
Make xxx return now? (y or n) y
Could not fetch register "fflags"; remote failure reply 'E14'

This is because riscv_gdb_get_fpu calls riscv_csrrw_debug with a wrong csr
number (8). It should use the csr_register_map in order to reach the
riscv_cpu_get_fflags callback.

Signed-off-by: KONRAD Frederic <frederic.konrad@adacore.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agotarget/riscv: Use TB_FLAGS_MSTATUS_FS for floating point
Alistair Francis [Fri, 23 Aug 2019 15:21:25 +0000 (08:21 -0700)] 
target/riscv: Use TB_FLAGS_MSTATUS_FS for floating point

Use the TB_FLAGS_MSTATUS_FS macro when enabling floating point in the tb
flags.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agotarget/riscv: Fix mstatus dirty mask
Alistair Francis [Fri, 23 Aug 2019 15:21:22 +0000 (08:21 -0700)] 
target/riscv: Fix mstatus dirty mask

This is meant to mask off the hypervisor bits, but a typo caused it to
mask MPP instead.

Fixes: 1f0419cb04 ("target/riscv: Allow setting mstatus virtulisation bits")
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agotarget/riscv: Use both register name and ABI name
Atish Patra [Fri, 23 Aug 2019 15:21:19 +0000 (08:21 -0700)] 
target/riscv: Use both register name and ABI name

Use both the generic register name and ABI name for the general purpose
registers and floating point registers.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sifive_u: Update model and compatible strings in device tree
Bin Meng [Fri, 6 Sep 2019 16:20:19 +0000 (09:20 -0700)] 
riscv: sifive_u: Update model and compatible strings in device tree

This updates model and compatible strings to use the same strings
as used in the Linux kernel device tree (hifive-unleashed-a00.dts).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sifive_u: Remove handcrafted clock nodes for UART and ethernet
Bin Meng [Fri, 6 Sep 2019 16:20:18 +0000 (09:20 -0700)] 
riscv: sifive_u: Remove handcrafted clock nodes for UART and ethernet

In the past we did not have a model for PRCI, hence two handcrafted
clock nodes ("/soc/ethclk" and "/soc/uartclk") were created for the
purpose of supplying hard-coded clock frequencies. But now since we
have added the PRCI support in QEMU, we don't need them any more.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sifive_u: Fix broken GEM support
Bin Meng [Fri, 6 Sep 2019 16:20:17 +0000 (09:20 -0700)] 
riscv: sifive_u: Fix broken GEM support

At present the GEM support in sifive_u machine is seriously broken.
The GEM block register base was set to a weird number (0x100900FC),
which for no way could work with the cadence_gem model in QEMU.

Not like other GEM variants, the FU540-specific GEM has a management
block to control 10/100/1000Mbps link speed changes, that is mapped
to 0x100a0000. We can simply map it into MMIO space without special
handling using create_unimplemented_device().

Update the GEM node compatible string to use the official name used
by the upstream Linux kernel, and add the management block reg base
& size to the <reg> property encoding.

Tested with upstream U-Boot and Linux kernel MACB drivers.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sifive_u: Instantiate OTP memory with a serial number
Bin Meng [Fri, 6 Sep 2019 16:20:16 +0000 (09:20 -0700)] 
riscv: sifive_u: Instantiate OTP memory with a serial number

This adds an OTP memory with a given serial number to the sifive_u
machine. With such support, the upstream U-Boot for sifive_fu540
boots out of the box on the sifive_u machine.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sifive: Implement a model for SiFive FU540 OTP
Bin Meng [Fri, 6 Sep 2019 16:20:15 +0000 (09:20 -0700)] 
riscv: sifive: Implement a model for SiFive FU540 OTP

This implements a simple model for SiFive FU540 OTP (One-Time
Programmable) Memory interface, primarily for reading out the
stored serial number from the first 1 KiB of the 16 KiB OTP
memory reserved by SiFive for internal use.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: roms: Update default bios for sifive_u machine
Bin Meng [Fri, 6 Sep 2019 16:20:14 +0000 (09:20 -0700)] 
riscv: roms: Update default bios for sifive_u machine

With the support of heterogeneous harts and PRCI model, it's now
possible to use the OpenSBI image (PLATFORM=sifive/fu540) built
for the real hardware.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sifive_u: Change UART node name in device tree
Bin Meng [Fri, 6 Sep 2019 16:20:13 +0000 (09:20 -0700)] 
riscv: sifive_u: Change UART node name in device tree

OpenSBI for fu540 does DT fix up (see fu540_modify_dt()) by updating
chosen "stdout-path" to point to "/soc/serial@...", and U-Boot will
use this information to locate the serial node and probe its driver.
However currently we generate the UART node name as "/soc/uart@...",
causing U-Boot fail to find the serial node in DT.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sifive_u: Update UART base addresses and IRQs
Bin Meng [Fri, 6 Sep 2019 16:20:12 +0000 (09:20 -0700)] 
riscv: sifive_u: Update UART base addresses and IRQs

This updates the UART base address and IRQs to match the hardware.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jonathan Behrens <fintelia@gmail.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Chih-Min Chao <chihmin.chao@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sifive_u: Reference PRCI clocks in UART and ethernet nodes
Bin Meng [Fri, 6 Sep 2019 16:20:11 +0000 (09:20 -0700)] 
riscv: sifive_u: Reference PRCI clocks in UART and ethernet nodes

Now that we have added a PRCI node, update existing UART and ethernet
nodes to reference PRCI as their clock sources, to keep in sync with
the Linux kernel device tree.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sifive_u: Add PRCI block to the SoC
Bin Meng [Fri, 6 Sep 2019 16:20:10 +0000 (09:20 -0700)] 
riscv: sifive_u: Add PRCI block to the SoC

Add PRCI mmio base address and size mappings to sifive_u machine,
and generate the corresponding device tree node.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sifive_u: Generate hfclk and rtcclk nodes
Bin Meng [Fri, 6 Sep 2019 16:20:09 +0000 (09:20 -0700)] 
riscv: sifive_u: Generate hfclk and rtcclk nodes

To keep in sync with Linux kernel device tree, generate hfclk and
rtcclk nodes in the device tree, to be referenced by PRCI node.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sifive: Implement PRCI model for FU540
Bin Meng [Fri, 6 Sep 2019 16:20:08 +0000 (09:20 -0700)] 
riscv: sifive: Implement PRCI model for FU540

This adds a simple PRCI model for FU540 (sifive_u). It has different
register layout from the existing PRCI model for FE310 (sifive_e).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sifive_u: Update PLIC hart topology configuration string
Bin Meng [Fri, 6 Sep 2019 16:20:07 +0000 (09:20 -0700)] 
riscv: sifive_u: Update PLIC hart topology configuration string

With heterogeneous harts config, the PLIC hart topology configuration
string are "M,MS,.." because of the monitor hart #0.

Suggested-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sifive_u: Update hart configuration to reflect the real FU540 SoC
Bin Meng [Fri, 6 Sep 2019 16:20:06 +0000 (09:20 -0700)] 
riscv: sifive_u: Update hart configuration to reflect the real FU540 SoC

The FU540-C000 includes a 64-bit E51 RISC-V core and four 64-bit U54
RISC-V cores. Currently the sifive_u machine only populates 4 U54
cores. Update the max cpu number to 5 to reflect the real hardware,
by creating 2 CPU clusters as containers for RISC-V hart arrays to
populate heterogeneous harts.

The cpu nodes in the generated DTS have been updated as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sifive_u: Set the minimum number of cpus to 2
Bin Meng [Fri, 6 Sep 2019 16:20:05 +0000 (09:20 -0700)] 
riscv: sifive_u: Set the minimum number of cpus to 2

It is not useful if we only have one management CPU.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
[Palmer: Set default CPUs to 2]
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: hart: Add a "hartid-base" property to RISC-V hart array
Bin Meng [Fri, 6 Sep 2019 16:20:04 +0000 (09:20 -0700)] 
riscv: hart: Add a "hartid-base" property to RISC-V hart array

At present each hart's hartid in a RISC-V hart array is assigned
the same value of its index in the hart array. But for a system
that has multiple hart arrays, this is not the case any more.

Add a new "hartid-base" property so that hartid number can be
assigned based on the property value.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: hart: Extract hart realize to a separate routine
Bin Meng [Fri, 6 Sep 2019 16:20:03 +0000 (09:20 -0700)] 
riscv: hart: Extract hart realize to a separate routine

Currently riscv_harts_realize() creates all harts based on the
same cpu type given in the hart array property. With current
implementation it can only create homogeneous harts. Exact the
hart realize to a separate routine in preparation for supporting
multiple hart arrays.

Note the file header says the RISC-V hart array holds the state
of a heterogeneous array of RISC-V harts, which is not true.
Update the comment to mention homogeneous array of RISC-V harts.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: Add a sifive_cpu.h to include both E and U cpu type defines
Bin Meng [Fri, 6 Sep 2019 16:20:02 +0000 (09:20 -0700)] 
riscv: Add a sifive_cpu.h to include both E and U cpu type defines

Group SiFive E and U cpu type defines into one header file.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sifive_e: Drop sifive_mmio_emulate()
Bin Meng [Fri, 6 Sep 2019 16:20:01 +0000 (09:20 -0700)] 
riscv: sifive_e: Drop sifive_mmio_emulate()

Use create_unimplemented_device() instead.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sifive_e: prci: Update the PRCI register block size
Bin Meng [Fri, 6 Sep 2019 16:20:00 +0000 (09:20 -0700)] 
riscv: sifive_e: prci: Update the PRCI register block size

Currently the PRCI register block size is set to 0x8000, but in fact
0x1000 is enough, which is also what the manual says.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Chih-Min Chao <chihmin.chao@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sifive_e: prci: Fix a typo of hfxosccfg register programming
Bin Meng [Fri, 6 Sep 2019 16:19:59 +0000 (09:19 -0700)] 
riscv: sifive_e: prci: Fix a typo of hfxosccfg register programming

For hfxosccfg register programming, SIFIVE_E_PRCI_HFXOSCCFG_RDY and
SIFIVE_E_PRCI_HFXOSCCFG_EN should be used.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Chih-Min Chao <chihmin.chao@sifive.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sifive: Rename sifive_prci.{c, h} to sifive_e_prci.{c, h}
Bin Meng [Fri, 6 Sep 2019 16:19:58 +0000 (09:19 -0700)] 
riscv: sifive: Rename sifive_prci.{c, h} to sifive_e_prci.{c, h}

Current SiFive PRCI model only works with sifive_e machine, as it
only emulates registers or PRCI block in the FE310 SoC.

Rename the file name to make it clear that it is for sifive_e.
This also prefix "sifive_e"/"SIFIVE_E" for all macros, variables
and functions.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Chih-Min Chao <chihmin.chao@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sifive_u: Remove the unnecessary include of prci header
Bin Meng [Fri, 6 Sep 2019 16:19:57 +0000 (09:19 -0700)] 
riscv: sifive_u: Remove the unnecessary include of prci header

sifive_u machine does not use PRCI as of today. Remove the prci
header inclusion.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: roms: Remove executable attribute of opensbi images
Bin Meng [Fri, 6 Sep 2019 16:19:56 +0000 (09:19 -0700)] 
riscv: roms: Remove executable attribute of opensbi images

Like other binary files, the executable attribute of opensbi images
should not be set.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: hw: Remove the unnecessary include of target/riscv/cpu.h
Bin Meng [Fri, 6 Sep 2019 16:19:55 +0000 (09:19 -0700)] 
riscv: hw: Remove the unnecessary include of target/riscv/cpu.h

The inclusion of "target/riscv/cpu.h" is unnecessary in various
sifive model drivers.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: hw: Change to use qemu_log_mask(LOG_GUEST_ERROR, ...) instead
Bin Meng [Fri, 6 Sep 2019 16:19:54 +0000 (09:19 -0700)] 
riscv: hw: Change to use qemu_log_mask(LOG_GUEST_ERROR, ...) instead

Replace the call to hw_error() with qemu_log_mask(LOG_GUEST_ERROR,...)
in various sifive models.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: hw: Change create_fdt() to return void
Bin Meng [Fri, 6 Sep 2019 16:19:53 +0000 (09:19 -0700)] 
riscv: hw: Change create_fdt() to return void

There is no need to return fdt at the end of create_fdt() because
it's already saved in s->fdt.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Chih-Min Chao <chihmin.chao@sifive.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: hw: Remove not needed PLIC properties in device tree
Bin Meng [Fri, 6 Sep 2019 16:19:52 +0000 (09:19 -0700)] 
riscv: hw: Remove not needed PLIC properties in device tree

This removes "reg-names" and "riscv,max-priority" properties of the
PLIC node from device tree.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jonathan Behrens <fintelia@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: hw: Use qemu_fdt_setprop_cell() for property with only 1 cell
Bin Meng [Fri, 6 Sep 2019 16:19:51 +0000 (09:19 -0700)] 
riscv: hw: Use qemu_fdt_setprop_cell() for property with only 1 cell

Some of the properties only have 1 cell so we should use
qemu_fdt_setprop_cell() instead of qemu_fdt_setprop_cells().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: hw: Remove superfluous "linux, phandle" property
Bin Meng [Fri, 6 Sep 2019 16:19:50 +0000 (09:19 -0700)] 
riscv: hw: Remove superfluous "linux, phandle" property

"linux,phandle" property is optional. Remove all instances in the
sifive_u, virt and spike machine device trees.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: hw: Remove duplicated "hw/hw.h" inclusion
Bin Meng [Fri, 6 Sep 2019 16:19:48 +0000 (09:19 -0700)] 
riscv: hw: Remove duplicated "hw/hw.h" inclusion

Commit a27bd6c779ba ("Include hw/qdev-properties.h less") wrongly
added "hw/hw.h" to sifive_prci.c and sifive_test.c.

Another inclusion of "hw/hw.h" was later added via
commit 650d103d3ea9 ("Include hw/hw.h exactly where needed"), that
resulted in duplicated inclusion of "hw/hw.h".

Fixes: a27bd6c779ba ("Include hw/qdev-properties.h less")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sifive_test: Add reset functionality
Bin Meng [Thu, 5 Sep 2019 15:55:16 +0000 (08:55 -0700)] 
riscv: sifive_test: Add reset functionality

This adds a reset opcode for sifive_test device to trigger a system
reset for testing purpose.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: hmp: Add a command to show virtual memory mappings
Bin Meng [Wed, 14 Aug 2019 15:33:32 +0000 (08:33 -0700)] 
riscv: hmp: Add a command to show virtual memory mappings

This adds 'info mem' command for RISC-V, to show virtual memory
mappings that aids debugging.

Rather than showing every valid PTE, the command compacts the
output by merging all contiguous physical address mappings into
one block and only shows the merged block mapping details.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: Resolve full path of the given bios image
Bin Meng [Fri, 16 Aug 2019 13:09:36 +0000 (06:09 -0700)] 
riscv: Resolve full path of the given bios image

At present when "-bios image" is supplied, we just use the straight
path without searching for the configured data directories. Like
"-bios default", we add the same logic so that "-L" actually works.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: Add a helper routine for finding firmware
Bin Meng [Fri, 16 Aug 2019 13:09:35 +0000 (06:09 -0700)] 
riscv: Add a helper routine for finding firmware

This adds a helper routine for finding firmware. It is currently
used only for "-bios default" case.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: rv32: Root page table address can be larger than 32-bit
Bin Meng [Thu, 8 Aug 2019 02:49:30 +0000 (19:49 -0700)] 
riscv: rv32: Root page table address can be larger than 32-bit

For RV32, the root page table's PPN has 22 bits hence its address
bits could be larger than the maximum bits that target_ulong is
able to represent. Use hwaddr instead.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agotarget/riscv: Update the Hypervisor CSRs to v0.4
Alistair Francis [Tue, 30 Jul 2019 23:35:32 +0000 (16:35 -0700)] 
target/riscv: Update the Hypervisor CSRs to v0.4

Update the Hypervisor CSR addresses to match the v0.4 spec.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agotarget/riscv: Create function to test if FP is enabled
Alistair Francis [Tue, 30 Jul 2019 23:35:24 +0000 (16:35 -0700)] 
target/riscv: Create function to test if FP is enabled

Let's create a function that tests if floating point support is
enabled. We can then protect all floating point operations based on if
they are enabled.

This patch so far doesn't change anything, it's just preparing for the
Hypervisor support for floating point operations.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Christophe de Dinechin <dinechin@redhat.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: plic: Remove unused interrupt functions
Alistair Francis [Tue, 30 Jul 2019 23:35:21 +0000 (16:35 -0700)] 
riscv: plic: Remove unused interrupt functions

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Jonathan Behrens <fintelia@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Chih-Min Chao <chihmin.chao@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agotarget/riscv/pmp: Convert qemu_log_mask(LOG_TRACE) to trace events
Philippe Mathieu-Daudé [Tue, 23 Jul 2019 12:08:16 +0000 (14:08 +0200)] 
target/riscv/pmp: Convert qemu_log_mask(LOG_TRACE) to trace events

Use the always-compiled trace events, remove the now unused
RISCV_DEBUG_PMP definition.

Note pmpaddr_csr_read() could previously do out-of-bound accesses
passing addr_index >= MAX_RISCV_PMPS.

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agotarget/riscv/pmp: Restrict priviledged PMP to system-mode emulation
Philippe Mathieu-Daudé [Tue, 23 Jul 2019 12:08:15 +0000 (14:08 +0200)] 
target/riscv/pmp: Restrict priviledged PMP to system-mode emulation

The RISC-V Physical Memory Protection is restricted to privileged
modes. Restrict its compilation to QEMU system builds.

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sifive_u: Fix clock-names property for ethernet node
Guenter Roeck [Fri, 19 Jul 2019 13:40:45 +0000 (06:40 -0700)] 
riscv: sifive_u: Fix clock-names property for ethernet node

The correct property name is clock-names, not clocks-names.

Without this patch, the Ethernet driver fails to instantiate with
the following error.

macb 100900fc.ethernet: failed to get macb_clk (-2)
macb: probe of 100900fc.ethernet failed with error -2

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sivive_u: Add dummy serial clock and aliases entry for uart
Guenter Roeck [Fri, 19 Jul 2019 13:40:44 +0000 (06:40 -0700)] 
riscv: sivive_u: Add dummy serial clock and aliases entry for uart

The riscv uart needs valid clocks. This requires a refereence
to the clock node. Since the SOC clock is not emulated by qemu,
add a reference to a fixed clock instead. The clock-frequency
entry in the uart node does not seem to be necessary, so drop it.

In addition to a reference to the clock, the driver also needs
an aliases entry for the serial node. Add it as well.

Without this patch, the serial driver fails to instantiate with
the following error message.

sifive-serial 10013000.uart: unable to find controller clock
sifive-serial: probe of 10013000.uart failed with error -2

when trying to boot Linux.

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoriscv: sifive_u: Add support for loading initrd
Guenter Roeck [Fri, 19 Jul 2019 13:40:43 +0000 (06:40 -0700)] 
riscv: sifive_u: Add support for loading initrd

Add support for loading initrd with "-initrd <filename>"
to the sifive_u machine. This lets us boot into Linux without
disk drive.

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2 years agoMerge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
Peter Maydell [Tue, 17 Sep 2019 15:24:08 +0000 (16:24 +0100)] 
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging

virtio,vhost,pc: features, fixes, cleanups.

Virtio 1.0 support for virtio-mmio.
Misc fixes, cleanups.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# gpg: Signature made Mon 16 Sep 2019 16:17:30 BST
# gpg:                using RSA key 281F0DB8D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full]
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>" [full]
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* remotes/mst/tags/for_upstream:
  virtio-mmio: implement modern (v2) personality (virtio-1)
  virtio pmem: user document
  intel_iommu: Remove the caching-mode check during flag change
  pc/q35: Disallow vfio-pci hotplug without VT-d caching mode
  qdev/machine: Introduce hotplug_allowed hook
  intel_iommu: Sanity check vfio-pci config on machine init done
  backends/vhost-user.c: prevent using uninitialized vqs
  vhost-user-blk: prevent using uninitialized vqs
  docs/nvdimm: add example on persistent backend setup
  MAINTAINERS: update virtio-rng and virtio-serial maintainer

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 years agovnc: fix memory leak when vnc disconnect
Li Qiang [Sat, 31 Aug 2019 15:39:22 +0000 (08:39 -0700)] 
vnc: fix memory leak when vnc disconnect

Currently when qemu receives a vnc connect, it creates a 'VncState' to
represent this connection. In 'vnc_worker_thread_loop' it creates a
local 'VncState'. The connection 'VcnState' and local 'VncState' exchange
data in 'vnc_async_encoding_start' and 'vnc_async_encoding_end'.
In 'zrle_compress_data' it calls 'deflateInit2' to allocate the libz library
opaque data. The 'VncState' used in 'zrle_compress_data' is the local
'VncState'. In 'vnc_zrle_clear' it calls 'deflateEnd' to free the libz
library opaque data. The 'VncState' used in 'vnc_zrle_clear' is the connection
'VncState'. In currently implementation there will be a memory leak when the
vnc disconnect. Following is the asan output backtrack:

Direct leak of 29760 byte(s) in 5 object(s) allocated from:
    0 0xffffa67ef3c3 in __interceptor_calloc (/lib64/libasan.so.4+0xd33c3)
    1 0xffffa65071cb in g_malloc0 (/lib64/libglib-2.0.so.0+0x571cb)
    2 0xffffa5e968f7 in deflateInit2_ (/lib64/libz.so.1+0x78f7)
    3 0xaaaacec58613 in zrle_compress_data ui/vnc-enc-zrle.c:87
    4 0xaaaacec58613 in zrle_send_framebuffer_update ui/vnc-enc-zrle.c:344
    5 0xaaaacec34e77 in vnc_send_framebuffer_update ui/vnc.c:919
    6 0xaaaacec5e023 in vnc_worker_thread_loop ui/vnc-jobs.c:271
    7 0xaaaacec5e5e7 in vnc_worker_thread ui/vnc-jobs.c:340
    8 0xaaaacee4d3c3 in qemu_thread_start util/qemu-thread-posix.c:502
    9 0xffffa544e8bb in start_thread (/lib64/libpthread.so.0+0x78bb)
    10 0xffffa53965cb in thread_start (/lib64/libc.so.6+0xd55cb)

This is because the opaque allocated in 'deflateInit2' is not freed in
'deflateEnd'. The reason is that the 'deflateEnd' calls 'deflateStateCheck'
and in the latter will check whether 's->strm != strm'(libz's data structure).
This check will be true so in 'deflateEnd' it just return 'Z_STREAM_ERROR' and
not free the data allocated in 'deflateInit2'.

The reason this happens is that the 'VncState' contains the whole 'VncZrle',
so when calling 'deflateInit2', the 's->strm' will be the local address.
So 's->strm != strm' will be true.

To fix this issue, we need to make 'zrle' of 'VncState' to be a pointer.
Then the connection 'VncState' and local 'VncState' exchange mechanism will
work as expection. The 'tight' of 'VncState' has the same issue, let's also turn
it to a pointer.

Reported-by: Ying Fang <fangying1@huawei.com>
Signed-off-by: Li Qiang <liq3ea@163.com>
Message-id: 20190831153922.121308-1-liq3ea@163.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2 years agoui: add an embedded Barrier client
Laurent Vivier [Fri, 6 Sep 2019 08:38:12 +0000 (10:38 +0200)] 
ui: add an embedded Barrier client

This allows to receive mouse and keyboard events from
a Barrier server.

This is enabled by adding the following parameter on the
command line

    ... -object input-barrier,id=$id,name=$name ...

Where $name is the name declared in the screens section of barrier.conf

The barrier server (barriers) must be configured and must run on the
local host.

For instance:

  section: screens
      localhost:
          ...
      VM-1:
          ...
      end

  section: links
      localhost:
          right = VM-1
      VM-1:
          left = localhost
  end

Then on the QEMU command line:

    ... -object input-barrier,id=barrie0,name=VM-1 ...

When the mouse will move out of the screen of the local host on
the right, the mouse and the keyboard will be grabbed and all
related events will be send to the guest OS.

This is usefull when qemu is configured without emulated graphic card
but with a VFIO attached graphic card.

More information about Barrier can be found at:

  https://github.com/debauchee/barrier

This avoids to install the Barrier server in the guest OS,
for instance when it is not supported or during the installation.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-id: 20190906083812.29487-1-laurent@vivier.eu
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2 years agovnc: fix websocket field in events
Gerd Hoffmann [Wed, 4 Sep 2019 05:52:50 +0000 (07:52 +0200)] 
vnc: fix websocket field in events

Just need to fill VncClientInfo.websocket in vnc_client_cache_addr().

Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=1748175
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id: 20190904055250.22421-1-kraxel@redhat.com

2 years agoui/egl: fix framebuffer reads
Gerd Hoffmann [Mon, 9 Sep 2019 07:39:11 +0000 (09:39 +0200)] 
ui/egl: fix framebuffer reads

Fix egl_fb_read() to use the (destination) surface size instead of the
(source) framebuffer source for glReadPixels.  Pass the DisplaySurface
instead of the pixeldata pointer to egl_fb_read() to make this possible.

With that in place framebuffer reads work fine even if the surface and
framebuffer sizes don't match, so we can remove the guest-triggerable
asserts in egl_scanout_flush().

Buglink: https://bugzilla.redhat.com//show_bug.cgi?id=1749659
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-id: 20190909073911.24787-1-kraxel@redhat.com

2 years agotarget/sparc: Switch to do_transaction_failed() hook
Peter Maydell [Thu, 1 Aug 2019 18:30:12 +0000 (19:30 +0100)] 
target/sparc: Switch to do_transaction_failed() hook

Switch the SPARC target from the old unassigned_access hook to the
new do_transaction_failed hook.

This will cause the "if transaction failed" code paths added in
the previous commits to become active if the access is to an
unassigned address. In particular we'll now handle bus errors
during page table walks correctly (generating a translation
error with the right kind of fault status).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-id: 20190801183012.17564-8-peter.maydell@linaro.org

2 years agotarget/sparc: Remove unused ldl_phys from dump_mmu()
Peter Maydell [Thu, 1 Aug 2019 18:30:11 +0000 (19:30 +0100)] 
target/sparc: Remove unused ldl_phys from dump_mmu()

The dump_mmu() function does a ldl_phys() at the start, but
then never uses the value it loads at all. Remove the
unused code.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-id: 20190801183012.17564-7-peter.maydell@linaro.org

2 years agotarget/sparc: Handle bus errors in mmu_probe()
Peter Maydell [Thu, 1 Aug 2019 18:30:10 +0000 (19:30 +0100)] 
target/sparc: Handle bus errors in mmu_probe()

Convert the mmu_probe() function to using address_space_ldl()
rather than ldl_phys(), so we can explicitly detect memory
transaction failures.

This makes no practical difference at the moment, because
ldl_phys() will return 0 on a transaction failure, and we
treat transaction failures and 0 PDEs identically. However
the spec says that MMU probe operations are supposed to
update the fault status registers, and if we ever implement
that we'll want to distinguish the difference. For the
moment, just add a TODO comment about the bug.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-id: 20190801183012.17564-6-peter.maydell@linaro.org

2 years agotarget/sparc: Correctly handle bus errors in page table walks
Peter Maydell [Thu, 1 Aug 2019 18:30:09 +0000 (19:30 +0100)] 
target/sparc: Correctly handle bus errors in page table walks

Currently we use the ldl_phys() function to read page table entries.
With the unassigned_access hook in place, if these hit an unassigned
area of memory then the hook will cause us to wrongly generate
an exception with a fault address matching the address of the
page table entry.

Change to using address_space_ldl() so we can detect and correctly
handle bus errors and give them their correct behaviour of
causing a translation error with a suitable fault status register.

Note that this won't actually take effect until we switch the
over to using the do_translation_failed hook.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-id: 20190801183012.17564-5-peter.maydell@linaro.org

2 years agotarget/sparc: Check for transaction failures in MXCC stream ASI accesses
Peter Maydell [Thu, 1 Aug 2019 18:30:08 +0000 (19:30 +0100)] 
target/sparc: Check for transaction failures in MXCC stream ASI accesses

Currently the ld/st_asi helper functions make calls to the
ld*_phys() and st*_phys() functions for those ASIs which
imply direct accesses to physical addresses. These implicitly
rely on the unassigned_access hook to cause them to generate
an MMU fault if the access fails.

Switch to using the address_space_* functions instead, which
return a MemTxResult that we can check. This means that when
we switch SPARC over to using the do_transaction_failed hook
we'll still get the same MMU faults we did before.

This commit converts the ASIs which do MXCC stream source
and destination accesses.

It's not clear to me whether raising an MMU fault like this
is the correct behaviour if we encounter a bus error, but
we retain the same behaviour that the old unassigned_access
hook would implement.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-id: 20190801183012.17564-4-peter.maydell@linaro.org

2 years agotarget/sparc: Check for transaction failures in MMU passthrough ASIs
Peter Maydell [Thu, 1 Aug 2019 18:30:07 +0000 (19:30 +0100)] 
target/sparc: Check for transaction failures in MMU passthrough ASIs

Currently the ld/st_asi helper functions make calls to the
ld*_phys() and st*_phys() functions for those ASIs which
imply direct accesses to physical addresses. These implicitly
rely on the unassigned_access hook to cause them to generate
an MMU fault if the access fails.

Switch to using the address_space_* functions instead, which
return a MemTxResult that we can check. This means that when
we switch SPARC over to using the do_transaction_failed hook
we'll still get the same MMU faults we did before.

This commit converts the ASIs which do "MMU passthrough".

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-id: 20190801183012.17564-3-peter.maydell@linaro.org

2 years agotarget/sparc: Factor out the body of sparc_cpu_unassigned_access()
Peter Maydell [Thu, 1 Aug 2019 18:30:06 +0000 (19:30 +0100)] 
target/sparc: Factor out the body of sparc_cpu_unassigned_access()

Currently the SPARC target uses the old-style do_unassigned_access
hook.  We want to switch it over to do_transaction_failed, but to do
this we must first remove all the direct calls in ldst_helper.c to
cpu_unassigned_access().  Factor out the body of the hook function's
code into a new sparc_raise_mmu_fault() and call it from the hook and
from the various places that used to call cpu_unassigned_access().

In passing, this fixes a bug where the code that raised the
MMU exception was directly calling GETPC() from a function that
was several levels deep in the callstack from the original
helper function: the new sparc_raise_mmu_fault() instead takes
the return address as an argument.

Other than the use of retaddr rather than GETPC() and a comment
format fixup, the body of the new function has no changes from
that of the old hook function.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-id: 20190801183012.17564-2-peter.maydell@linaro.org

2 years agoMerge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
Peter Maydell [Tue, 17 Sep 2019 09:20:17 +0000 (10:20 +0100)] 
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* Fix Patchew CI failures (myself)
* i386 fw_cfg refactoring (Philippe)
* pmem bugfix (Stefan)
* Support for accessing cstate MSRs (Wanpeng)
* exec.c cleanups (Wei Yang)
* Improved throttling (Yury)
* elf-ops.h coverity fix (Stefano)

# gpg: Signature made Mon 16 Sep 2019 16:13:12 BST
# gpg:                using RSA key BFFBD25F78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream: (29 commits)
  hw/i386/pc: Extract the x86 generic fw_cfg code
  hw/i386/pc: Rename pc_build_feature_control() as generic fw_cfg_build_*
  hw/i386/pc: Let pc_build_feature_control() take a MachineState argument
  hw/i386/pc: Let pc_build_feature_control() take a FWCfgState argument
  hw/i386/pc: Rename pc_build_smbios() as generic fw_cfg_build_smbios()
  hw/i386/pc: Let pc_build_smbios() take a generic MachineState argument
  hw/i386/pc: Let pc_build_smbios() take a FWCfgState argument
  hw/i386/pc: Replace PCMachineState argument with MachineState in fw_cfg_arch_create
  hw/i386/pc: Pass the CPUArchIdList array by argument
  hw/i386/pc: Pass the apic_id_limit value by argument
  hw/i386/pc: Pass the boot_cpus value by argument
  hw/i386/pc: Rename bochs_bios_init as more generic fw_cfg_arch_create
  hw/i386/pc: Use address_space_memory in place
  hw/i386/pc: Extract e820 memory layout code
  hw/i386/pc: Use e820_get_num_entries() to access e820_entries
  cpus: Fix throttling during vm_stop
  qemu-thread: Add qemu_cond_timedwait
  memory: inline and optimize devend_memop
  memory: fetch pmem size in get_file_size()
  elf-ops.h: fix int overflow in load_elf()
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 years agovirtio-mmio: implement modern (v2) personality (virtio-1)
Sergio Lopez [Fri, 13 Sep 2019 12:06:01 +0000 (14:06 +0200)] 
virtio-mmio: implement modern (v2) personality (virtio-1)

Implement the modern (v2) personality, according to the VirtIO 1.0
specification.

Support for v2 among guests is not as widespread as it'd be
desirable. While the Linux driver has had it for a while, support is
missing, at least, from Tianocore EDK II, NetBSD and FreeBSD.

For this reason, the v2 personality is disabled, keeping the legacy
behavior as default. Machine types willing to use v2, can enable it
using MachineClass's compat_props.

Signed-off-by: Sergio Lopez <slp@redhat.com>
Message-Id: <20190913120559.40835-1-slp@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2 years agohw/i386/pc: Extract the x86 generic fw_cfg code
Philippe Mathieu-Daudé [Mon, 16 Sep 2019 10:49:28 +0000 (12:49 +0200)] 
hw/i386/pc: Extract the x86 generic fw_cfg code

Extract all the functions that are not PC-machine specific into
the (arch-specific) fw_cfg.c file. This will allow other X86-machine
to reuse these functions.

Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190818225414.22590-16-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 years agohw/i386/pc: Rename pc_build_feature_control() as generic fw_cfg_build_*
Philippe Mathieu-Daudé [Sun, 18 Aug 2019 22:54:13 +0000 (00:54 +0200)] 
hw/i386/pc: Rename pc_build_feature_control() as generic fw_cfg_build_*

Now that the pc_build_feature_control_file() function has been
refactored to not depend of PC specific types, rename it to a
more generic name.

Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190818225414.22590-15-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 years agohw/i386/pc: Let pc_build_feature_control() take a MachineState argument
Philippe Mathieu-Daudé [Sun, 18 Aug 2019 22:54:12 +0000 (00:54 +0200)] 
hw/i386/pc: Let pc_build_feature_control() take a MachineState argument

Let the pc_build_feature_control_file() function take a generic MachineState
argument.

Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190818225414.22590-14-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 years agohw/i386/pc: Let pc_build_feature_control() take a FWCfgState argument
Philippe Mathieu-Daudé [Sun, 18 Aug 2019 22:54:11 +0000 (00:54 +0200)] 
hw/i386/pc: Let pc_build_feature_control() take a FWCfgState argument

Pass the FWCfgState object by argument, this will
allow us to remove the PCMachineState argument later.

Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190818225414.22590-13-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 years agohw/i386/pc: Rename pc_build_smbios() as generic fw_cfg_build_smbios()
Philippe Mathieu-Daudé [Sun, 18 Aug 2019 22:54:10 +0000 (00:54 +0200)] 
hw/i386/pc: Rename pc_build_smbios() as generic fw_cfg_build_smbios()

Now that the pc_build_smbios() function has been refactored to not
depend of PC specific types, rename it to a more generic name.

Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190818225414.22590-12-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 years agohw/i386/pc: Let pc_build_smbios() take a generic MachineState argument
Philippe Mathieu-Daudé [Sun, 18 Aug 2019 22:54:09 +0000 (00:54 +0200)] 
hw/i386/pc: Let pc_build_smbios() take a generic MachineState argument

Let the pc_build_smbios() function take a generic MachineState
argument.

Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190818225414.22590-11-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 years agohw/i386/pc: Let pc_build_smbios() take a FWCfgState argument
Philippe Mathieu-Daudé [Sun, 18 Aug 2019 22:54:08 +0000 (00:54 +0200)] 
hw/i386/pc: Let pc_build_smbios() take a FWCfgState argument

Pass the FWCfgState object by argument, this will
allow us to remove the PCMachineState argument later.

Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190818225414.22590-10-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 years agohw/i386/pc: Replace PCMachineState argument with MachineState in fw_cfg_arch_create
Paolo Bonzini [Mon, 16 Sep 2019 10:42:42 +0000 (12:42 +0200)] 
hw/i386/pc: Replace PCMachineState argument with MachineState in fw_cfg_arch_create

In the previous commit we removed the last access to PCMachineState.
Replace it with a generic MachineState argument and use it to retrieve
the CPUArchIdList.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 years agohw/i386/pc: Pass the CPUArchIdList array by argument
Philippe Mathieu-Daudé [Sun, 18 Aug 2019 22:54:06 +0000 (00:54 +0200)] 
hw/i386/pc: Pass the CPUArchIdList array by argument

Pass the CPUArchIdList array by argument, this will
allow us to remove the PCMachineState argument later.

Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190818225414.22590-8-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 years agohw/i386/pc: Pass the apic_id_limit value by argument
Philippe Mathieu-Daudé [Sun, 18 Aug 2019 22:54:05 +0000 (00:54 +0200)] 
hw/i386/pc: Pass the apic_id_limit value by argument

Pass the apic_id_limit value by argument, this will
allow us to remove the PCMachineState argument later.

Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190818225414.22590-7-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>