qemu.git
7 years agotarget-arm/helper.c: Don't assume softfloat int32 is 32 bits only
Peter Maydell [Wed, 25 Jan 2012 11:49:46 +0000 (11:49 +0000)] 
target-arm/helper.c: Don't assume softfloat int32 is 32 bits only

In the helper routines for VCVT float-to-int conversions, add
an explicit cast rather than relying on the softfloat int32
type being exactly 32 bits wide (which it is not guaranteed to be).
Without this, if the softfloat type was 64 bits wide we would
get zero-extension of the 32 bit value from the ARM register
rather than sign-extension, since TCG i32 values are passed as
uint32_t.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agotarget-arm: Fix implementation of TLB invalidate operations
Peter Maydell [Wed, 25 Jan 2012 11:49:46 +0000 (11:49 +0000)] 
target-arm: Fix implementation of TLB invalidate operations

Fix some bugs in the implementation of the TLB invalidate
operations on ARM:
 * the 'invalidate all' op was not passing flush_global=1
   to tlb_flush(); this doesn't have a practical effect since
   tlb_flush() currently ignores that argument, but is
   semantically incorrect
 * 'invalidate by address for all ASIDs' was implemented as
   flushing the whole TLB, which invalidates much more than
   strictly necessary. Use tlb_flush_page() instead.
We also annotate the ops with the ARM ARM official acronyms.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agohyperv: fix build on non-KVM hosts
Blue Swirl [Mon, 23 Jan 2012 19:59:14 +0000 (19:59 +0000)] 
hyperv: fix build on non-KVM hosts

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
7 years agoMerge remote-tracking branch 'qemu-kvm/uq/master' into staging
Anthony Liguori [Mon, 23 Jan 2012 17:00:26 +0000 (11:00 -0600)] 
Merge remote-tracking branch 'qemu-kvm/uq/master' into staging

* qemu-kvm/uq/master:
  kvm: Activate in-kernel irqchip support
  kvm: x86: Add user space part for in-kernel IOAPIC
  kvm: x86: Add user space part for in-kernel i8259
  kvm: x86: Add user space part for in-kernel APIC
  kvm: x86: Establish IRQ0 override control
  kvm: Introduce core services for in-kernel irqchip support
  memory: Introduce memory_region_init_reservation
  ioapic: Factor out base class for KVM reuse
  ioapic: Drop post-load irr initialization
  i8259: Factor out base class for KVM reuse
  i8259: Completely privatize PicState
  apic: Open-code timer save/restore
  apic: Factor out base class for KVM reuse
  apic: Introduce apic_report_irq_delivered
  apic: Inject external NMI events via LINT1
  apic: Stop timer on reset
  kvm: Move kvmclock into hw/kvm folder
  msi: Generalize msix_supported to msi_supported
  hyper-v: initialize Hyper-V CPUID leaves.
  hyper-v: introduce Hyper-V support infrastructure.

Conflicts:
Makefile.target

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
7 years agoMerge remote-tracking branch 'afaerber/prep-up' into staging
Anthony Liguori [Mon, 23 Jan 2012 16:58:02 +0000 (10:58 -0600)] 
Merge remote-tracking branch 'afaerber/prep-up' into staging

* afaerber/prep-up:
  prep: Use i82378 PCI->ISA bridge for 'prep' machine
  prep: Add i82378 PCI-to-ISA bridge emulation
  prep: Add i82374 DMA emulation
  MAINTAINERS: Add PCI host bridge files to PReP machine
  prep: qdev'ify Raven host bridge (SysBus)
  prep_pci: Update I/O to MemoryRegion ops
  prep_pci: Simplify I/O endianness
  prep: qdev'ify Raven host bridge (PCIDevice)
  prep: Use ISA m48t59
  prep: Fix offset of BIOS MemoryRegion

7 years agoe1000: bounds packet size against buffer size
Anthony Liguori [Mon, 23 Jan 2012 13:30:43 +0000 (07:30 -0600)] 
e1000: bounds packet size against buffer size

Otherwise we can write beyond the buffer and corrupt memory.  This is tracked
as CVE-2012-0029.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
7 years agotarget-sparc: Fix mixup of uint64 and uint64_t
Andreas Färber [Mon, 16 Jan 2012 00:46:51 +0000 (01:46 +0100)] 
target-sparc: Fix mixup of uint64 and uint64_t

Commit 793a137a41ad4125011c7022cf16a1baa40a5ab6 (target-sparc:
Implement BMASK/BSHUFFLE.) introduced a stray usage of softfloat uint64
type.

Use uint64_t instead.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
7 years agosga: fix copypasta
Blue Swirl [Sun, 23 Oct 2011 14:39:46 +0000 (14:39 +0000)] 
sga: fix copypasta

Fix the name of the init function.

Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
7 years agovga: make Cirrus ISA device optional
Blue Swirl [Sat, 1 Oct 2011 16:33:43 +0000 (16:33 +0000)] 
vga: make Cirrus ISA device optional

Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
7 years agovga: improve VGA logic
Blue Swirl [Tue, 27 Sep 2011 19:15:42 +0000 (19:15 +0000)] 
vga: improve VGA logic

Improve VGA selection logic, push check for device availabilty to vl.c.
Create the devices at board level unconditionally.

Remove now unused pci_try_create*() functions.

Make PCI VGA devices optional.

Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
7 years agograckle_pci: Clean up qdev names
Andreas Färber [Wed, 18 Jan 2012 00:11:16 +0000 (00:11 +0000)] 
grackle_pci: Clean up qdev names

Rename SysBus device from 'grackle' to 'grackle-pcihost' to resolve a
name conflict.

Also mark both devices as no_user.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Cc: Alexander Graf <agraf@suse.de>
Cc: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agoMAINTAINERS: Add PCI-PCI bridge to New World Mac machine
Andreas Färber [Wed, 18 Jan 2012 06:20:43 +0000 (06:20 +0000)] 
MAINTAINERS: Add PCI-PCI bridge to New World Mac machine

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agoPPC: Pseries: Check for PCI boundaries
Alexander Graf [Wed, 18 Jan 2012 15:42:09 +0000 (16:42 +0100)] 
PPC: Pseries: Check for PCI boundaries

We call pci_host_config_{read,write}_common() which perform PCI config
accesses. However they don't do all limit checking the way we expect
it to.

So let's introduce a small wrapper around them, making them behave the
way we would without touching generic code.

This patch is based on a patch by David Gibson which put this logic into
the generic code.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agoMAINTAINERS: Add PCI host bridge files to CHRP machines
Andreas Färber [Fri, 13 Jan 2012 13:33:58 +0000 (13:33 +0000)] 
MAINTAINERS: Add PCI host bridge files to CHRP machines

Just like prep_pci.c, these were not associated with any MAINTAINERS
section, including PCI.

Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Cc: Alexander Graf <agraf@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agoMAINTAINERS: Add qemu-ppc to all ppc target stuff
Andreas Färber [Fri, 13 Jan 2012 13:33:57 +0000 (13:33 +0000)] 
MAINTAINERS: Add qemu-ppc to all ppc target stuff

Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Cc: Alexander Graf <agraf@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agopseries: SLOF PCI flag day
Benjamin Herrenschmidt [Wed, 11 Jan 2012 19:46:28 +0000 (19:46 +0000)] 
pseries: SLOF PCI flag day

Currently on the pseries machine the SLOF firmware is used normally,
but we bypass it when -kernel is specified.  Having these two

different boot paths can cause some confusion.

In particular at present we need to "probe" the (emulated) PCI bus and
produce device tree nodes for the PCI devices in qemu, for the -kernel
case.  In the SLOF case, it takes the device tree from qemu adds some
stuff to it then passes it on to the kernel.

It's been decided that a better approach is to always boot through
SLOF, even when using -kernel.  WIth this approach we can leave PCI
probing and device node creation to SLOF in all cases which removes a
bunch of code in qemu, and avoids iterating the PCI devices from the
machine specific init code which we're not supposed to do.

This patch changes qemu to always boot through SLOF, and not to create
PCI nodes.  Simultaneously it updates the included version of SLOF
(submodule and binary image) to one which supports (and requires) the
new approach.

The new SLOF version also includes a number of unrelated enhancements:
support for booting from virtio-pci devices and e1000, greatly
improved FCode support and many bugfixes.  It also makes SLOF ready to
be used even when specifying a kernel on the qemu command line.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agopseries: Use correct dispatcher for PCI config space accesses
David Gibson [Wed, 11 Jan 2012 19:46:26 +0000 (19:46 +0000)] 
pseries: Use correct dispatcher for PCI config space accesses

The pseries machine expects a para-virtualized guest and so supplies RTAS
functions (via a hypercall) for performing PCI config space access.
Currently the implementation of these calls into
pci_default_{read,write}_config().  However this would be incorrect for
any PCI device which overrides the default config read/write functions.
AFAICT there's only one such device today, but we should still get it
right.  In addition the pci_host_config_{read,write}_common() functions
which do correctly do this dispatch, perform bounds checking on the config
space address, lack of which currently leads to an exploitable bug.

This patch corrects the problem.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agopseries: Support PCI extended config space in RTAS calls
Benjamin Herrenschmidt [Wed, 11 Jan 2012 19:46:25 +0000 (19:46 +0000)] 
pseries: Support PCI extended config space in RTAS calls

On the pseries machine (which expexts a paravirtualized guest), guest
access to PCI config space is via host-provided RTAS functions.  This
patch extends these RTAS functions to permit access to PCI extended
config space, as specified in PAPR.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agoCorrect types in bmdma_addr_{read,write}
David Gibson [Wed, 11 Jan 2012 19:46:24 +0000 (19:46 +0000)] 
Correct types in bmdma_addr_{read,write}

Back when I made patches introducing dma_addr_t and various PCI DMA
wrapper functions, I made a mistake.  The bmdma_addr_{read,write} functions
need to take target_phys_addr_t not dma_addr_t, since they are assigned
to MemoryRegionOps callbacks.

This patch corrects my error.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agoUpdate gitignore file
David Gibson [Wed, 11 Jan 2012 19:46:23 +0000 (19:46 +0000)] 
Update gitignore file

This patch adds several auto-generated files to .gitignore which were
previously missing.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agoFix dirty logging with 32-bit qemu & 64-bit guests
Benjamin Herrenschmidt [Wed, 11 Jan 2012 19:46:21 +0000 (19:46 +0000)] 
Fix dirty logging with 32-bit qemu & 64-bit guests

The kvm_get_dirty_pages_log_range() function uses two address
variables to step through the monitored memory region to update the
dirty log.  However, these variables have type unsigned long, which
can overflow if running a 64-bit guest with a 32-bit qemu binary.

This patch changes these to target_phys_addr_t which will have the
correct size.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agoload_image_targphys() should enforce the max size
Benjamin Herrenschmidt [Wed, 11 Jan 2012 19:46:20 +0000 (19:46 +0000)] 
load_image_targphys() should enforce the max size

load_image_targphys() gets passed a max size for the file, but doesn't
enforce it at all. Add a check and return -1 (error) if the file is
too big, without loading it.  Fix the bracing style in the function
while we're at it.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agovirtio: change memcpy to guest reads
Alexander Graf [Tue, 10 Jan 2012 22:33:10 +0000 (23:33 +0100)] 
virtio: change memcpy to guest reads

When accessing the device specific virtio config space, we memcpy
the data into a variable in QEMU. At that point we're basically
pulling host endianness into the game which is a really bad idea.

So instead, let's use the target specific load/store helpers for
memory pointers which fetch things in target endianness. The whole
array is already populated in target endianness anyways
(see virtio-blk).

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
7 years agovirtio-pci: Fix endianness of virtio config
Benjamin Herrenschmidt [Tue, 10 Jan 2012 01:35:11 +0000 (01:35 +0000)] 
virtio-pci: Fix endianness of virtio config

The virtio config area in PIO space is a bit special. The initial
header is little endian but the rest (device specific) is guest
native endian.

The PIO accessors for PCI on machines that don't have native IO ports
assume that all PIO is little endian, which works fine for everything
except the above.

A complicated way to fix it would be to split the BAR into two memory
regions with different endianess settings, but this isn't practical
to do, besides, the PIO code doesn't honor region endianness anyway
(I have a patch for that too but it isn't necessary at this stage).

So I decided to go for the quick fix instead which consists of
reverting the swap in virtio-pci in selected places, hoping that when
we eventually do a "v2" of the virtio protocols, we sort that out once
and for all using a fixed endian setting for everything.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
[agraf: keep virtio in libhw and determine endianness through a
        helper function in exec.c]
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
7 years agoPPC: Bamboo: Integrate SoC instatiation, use qdev for PCI
Alexander Graf [Tue, 10 Jan 2012 19:11:25 +0000 (20:11 +0100)] 
PPC: Bamboo: Integrate SoC instatiation, use qdev for PCI

Now that we have the SoC init function in the same file, let's integrate
it with the board initialization.

While at it, also make use of the newly qdev'ified PCI host controller.

Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agoPPC: Bamboo: fold ppc440.c and ppc440_bamboo.c into a single file
Alexander Graf [Tue, 10 Jan 2012 18:39:38 +0000 (19:39 +0100)] 
PPC: Bamboo: fold ppc440.c and ppc440_bamboo.c into a single file

The separation of ppc440 and ppc440_bamboo makes some sense, since ppc440
is the SoC while ppc440_bamboo is the actual board. But the separation
makes things harder for us for no good reason, so let's just fold them
in together with each other.

Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agoPPC: 4xx: Qdevify the 440 PCI host controller
Alexander Graf [Tue, 10 Jan 2012 18:36:26 +0000 (19:36 +0100)] 
PPC: 4xx: Qdevify the 440 PCI host controller

Due to popular demand, this qdevifies the PCI host controller of 4xx SoCs
the same way as e500.

We have to introduce a small stub function for pci init that will be
removed in a later patch, once we qdev'ified the board, to keep the build
working.

Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agoPPC: bamboo: fix whitespace
Alexander Graf [Tue, 10 Jan 2012 15:49:22 +0000 (16:49 +0100)] 
PPC: bamboo: fix whitespace

Tabs followed by spaces are a no-go. My editor shows it red, distracting
me from actual work! :)

Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agoPPC: bamboo: remove old machine descriptions
Alexander Graf [Tue, 10 Jan 2012 15:36:10 +0000 (16:36 +0100)] 
PPC: bamboo: remove old machine descriptions

Nobody needs to run bamboo in 0.12 compat mode. Remove the machine.

Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agoPPC: Enable 440EP CPU target
Alexander Graf [Tue, 3 Jan 2012 21:01:40 +0000 (22:01 +0100)] 
PPC: Enable 440EP CPU target

Now that we have 440 TLB emulation, we can also support running the 440EP
CPU target in system emulation mode.

Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agoPPC: 440: Default to 440EP CPU
Alexander Graf [Tue, 3 Jan 2012 21:00:23 +0000 (22:00 +0100)] 
PPC: 440: Default to 440EP CPU

Today we're exposing a Virtex 440 CPU to the guest despite the fact
that we're telling the guest that we're running on a 440EP one in the
device tree.

So let's better default to a real 440EP to make things synced again.

Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agoPPC: Bamboo: recompile device tree
Alexander Graf [Tue, 3 Jan 2012 20:58:57 +0000 (21:58 +0100)] 
PPC: Bamboo: recompile device tree

Recent dtc doesn't compile our dts anymore. Change all hex numbers to have
0x prefixes, indicate the old version and recompile using recent dtc.

This doesn't change any semantics in the device tree.

Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agoPPC: 440: Ignore invalid PCI IRQs
Alexander Graf [Tue, 3 Jan 2012 18:15:16 +0000 (19:15 +0100)] 
PPC: 440: Ignore invalid PCI IRQs

When running a 440 target, we currently get invalid irq_num values (-1)
which completely confuse the IRQ setting code.

This is most likely due to the missing qdev conversion.

While this shouldn't happen in the first place and should really rather
be fixed by converting the target, I dislike segfaults. So for now, let's
just print a warning and ignore invalid irq_num values.

Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agoPPC: Bamboo: Set initial TLB entry
Alexander Graf [Tue, 3 Jan 2012 18:12:47 +0000 (19:12 +0100)] 
PPC: Bamboo: Set initial TLB entry

Back in the day when the bamboo target got introduced, the initial TLB was
dictated by KVM. TCG has been missing initial TLB values ever since, rendering
the target unusable for TCG usage.

This patch adds linear TLB maps the way Linux expects them, making the target
work.

Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agoPPC: Bamboo: Register CPU reset
Alexander Graf [Tue, 3 Jan 2012 18:10:02 +0000 (19:10 +0100)] 
PPC: Bamboo: Register CPU reset

To be able to support CPU reset, we need to put all register initialization
and initial state into a CPU reset hook instead of a function that is only
called once on bootup.

This is a preparation step for the initial TLB setting code and brings bamboo
more in line with what e500 and virtex already do.

Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agoPPC: 440EP: Initialize timer
Alexander Graf [Tue, 3 Jan 2012 17:55:38 +0000 (18:55 +0100)] 
PPC: 440EP: Initialize timer

When using TCG with a BookE PowerPC core, we need to explicitly initialize
the BookE timers with the correct frequencies.

This was missing for 440EP, since that code came from KVM and was never used
with TCG.

Signed-off-by: Alexander Graf <agraf@suse.de>
7 years agoprep: Use i82378 PCI->ISA bridge for 'prep' machine
Andreas Färber [Mon, 9 Jan 2012 01:04:05 +0000 (02:04 +0100)] 
prep: Use i82378 PCI->ISA bridge for 'prep' machine

Speaker I/O, ISA bus, i8259 PIC, RTC and DMA are no longer set up
individually by the machine. Effectively, no-op speaker I/O is replaced
by pcspk; PIT and i82374 DMA are introduced.

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Remove related dead, alternative code.
Wire up PCI host bridge IRQs via GPIO-in IRQs of PCI->ISA bridge.

Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Cc: Alexander Graf <agraf@suse.de>
Cc: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoprep: Add i82378 PCI-to-ISA bridge emulation
Andreas Färber [Sat, 25 Dec 2010 05:01:41 +0000 (06:01 +0100)] 
prep: Add i82378 PCI-to-ISA bridge emulation

Prepare Intel 82378 emulation for use by PReP platforms.

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Create ISA bus in this device (suggested by Markus).
Rebase onto Memory API, mark memory ops as Little Endian.
Add VMState. Provide access to i8259 IRQs via qdev GPIOs.

Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Cc: Markus Armbruster <armbru@redhat.com>
Cc: Alexander Graf <agraf@suse.de>
Cc: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoprep: Add i82374 DMA emulation
Andreas Färber [Sat, 25 Dec 2010 04:29:37 +0000 (05:29 +0100)] 
prep: Add i82374 DMA emulation

Prepare Intel 82374 emulation for use by Intel 82378 PCI->ISA bridge.

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Confine to CONFIG_I82374. Add VMState.

Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Reviewed-by: Alexander Graf <agraf@suse.de>
7 years agoMAINTAINERS: Add PCI host bridge files to PReP machine
Andreas Färber [Fri, 6 Jan 2012 23:12:15 +0000 (00:12 +0100)] 
MAINTAINERS: Add PCI host bridge files to PReP machine

Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Acked-by: Alexander Graf <agraf@suse.de>
7 years agoprep: qdev'ify Raven host bridge (SysBus)
Andreas Färber [Tue, 3 Jan 2012 01:42:46 +0000 (02:42 +0100)] 
prep: qdev'ify Raven host bridge (SysBus)

Drop pci_prep_init() in favor of extended device state. Inspired by
patches from Hervé and Alex.

Assign the 4 IRQs from the board after device instantiation. This moves
the knowledge out of prep_pci and allows for future machines with
different IRQ wiring (IBM 40P). Suggested by Alex.

Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Reviewed-by: Alexander Graf <agraf@suse.de>
Cc: Hervé Poussineau <hpoussin@reactos.org>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Anthony Liguori <aliguori@us.ibm.com>
7 years agoprep_pci: Update I/O to MemoryRegion ops
Andreas Färber [Sat, 7 Jan 2012 07:28:53 +0000 (08:28 +0100)] 
prep_pci: Update I/O to MemoryRegion ops

Convert to new-style read/write callbacks.

Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Cc: Alexander Graf <agraf@suse.de>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Avi Kivity <avi@redhat.com>
Cc: Benoît Canet <benoit.canet@gmail.com>
7 years agoprep_pci: Simplify I/O endianness
Andreas Färber [Thu, 12 Jan 2012 02:44:42 +0000 (03:44 +0100)] 
prep_pci: Simplify I/O endianness

The prep PowerPC CPU is Big Endian. An explicit byte swap therefore
effectively becomes Little Endian.

Remove explicit byte swaps and mark as Little Endian.

Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Reviewed-by: Alexander Graf <agraf@suse.de>
Cc: Michael S. Tsirkin <mst@redhat.com>
7 years agoprep: qdev'ify Raven host bridge (PCIDevice)
Andreas Färber [Tue, 3 Jan 2012 00:50:07 +0000 (01:50 +0100)] 
prep: qdev'ify Raven host bridge (PCIDevice)

Move initialization of vendor ID, etc. to PCIDeviceInfo.
Introduce VMState.

Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Reviewed-by: Alexander Graf <agraf@suse.de>
Cc: Hervé Poussineau <hpoussin@reactos.org>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Anthony Liguori <aliguori@us.ibm.com>
7 years agoprep: Use ISA m48t59
Andreas Färber [Fri, 13 Jan 2012 17:03:48 +0000 (18:03 +0100)] 
prep: Use ISA m48t59

This simplifies the code later when the i8259 moves to the i82378
PCI->ISA bridge and happens to fix a SysBus m48t59 io_base issue
introduced by commit 0fb56ffc5edd66f12ccfc0d71af5f9c79c0a2612 (m48t59:
drop obsolete address base arithmetic). Suggested by Hervé and Jan.

Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Cc: Hervé Poussineau <hpoussin@reactos.org>
Cc: Jan Kiszka <jan.kiszka@siemens.com>
Cc: Blue Swirl <blauwirbel@gmail.com>
7 years agoprep: Fix offset of BIOS MemoryRegion
Andreas Färber [Thu, 5 Jan 2012 15:48:23 +0000 (16:48 +0100)] 
prep: Fix offset of BIOS MemoryRegion

Since 0c90c52fab5ea92d7f12b29bfe26a7cd75d9efcb (ppc_prep: convert to memory
API) OHW was "Trying to execute code outside RAM or ROM at 0xfff00700".

The BIOS MemoryRegion is created with a fixed size of 1 MiB.
Ensure that the full size can be accessed since the exception
vectors are located at 0xfff00000 and the BIOS may want to use them.

It thereby no longer depends on the actual BIOS binary size.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Cc: Avi Kivity <avi@redhat.com>
Cc: Alexander Graf <agraf@suse.de>
7 years agoMerge remote-tracking branch 'spice/spice.v47' into staging
Anthony Liguori [Thu, 19 Jan 2012 18:51:02 +0000 (12:51 -0600)] 
Merge remote-tracking branch 'spice/spice.v47' into staging

* spice/spice.v47:
  qxl: Slot sanity check in qxl_phys2virt() is off by one, fix

7 years agoMerge remote-tracking branch 'stefanha/trivial-patches' into staging
Anthony Liguori [Thu, 19 Jan 2012 15:23:59 +0000 (09:23 -0600)] 
Merge remote-tracking branch 'stefanha/trivial-patches' into staging

* stefanha/trivial-patches:
  Makefile: Remove generated headers on clean
  Makefile: Exclude tests/Makefile in unconfigured tree
  lm32: Fix mixup of uint32 and uint32_t
  tests: Silence gtester in Makefile
  qemu-tool: Fix mixup of int64 and int64_t

7 years agoMerge remote-tracking branch 'qmp/queue/qmp' into staging
Anthony Liguori [Thu, 19 Jan 2012 15:23:16 +0000 (09:23 -0600)] 
Merge remote-tracking branch 'qmp/queue/qmp' into staging

* qmp/queue/qmp:
  block: use proper qerrors in qmp_block_resize
  qerror: restore alphabetical order over qerrors
  qerror: add check-qerror.sh to verify alphabetical order
  qmp: Add missing gcc format attribute and fix format string
  qapi: Convert block_set_io_throttle
  qapi: Convert change
  qerror: Extend QERR_DEVICE_ENCRYPTED
  qapi: Introduce change-vnc-password
  monitor: expose readline state
  qapi: Convert eject
  block: eject_device(): Use error_set()
  qapi: Convert expire_password
  qapi: Convert set_password
  vnc: Simplify vnc_display_password()

7 years agoMerge remote-tracking branch 'pmaydell/arm-devs.for-upstream' into staging
Anthony Liguori [Thu, 19 Jan 2012 15:19:44 +0000 (09:19 -0600)] 
Merge remote-tracking branch 'pmaydell/arm-devs.for-upstream' into staging

* pmaydell/arm-devs.for-upstream:
  arm: make the number of GIC interrupts configurable
  hw/lan9118: Add save/load support
  arm: Remove incorrect comment in arm_timer
  vexpress, realview: Add (dummy) L2 cache controller

7 years agoMerge remote-tracking branch 'kraxel/usb.37' into staging
Anthony Liguori [Thu, 19 Jan 2012 14:34:38 +0000 (08:34 -0600)] 
Merge remote-tracking branch 'kraxel/usb.37' into staging

* kraxel/usb.37:
  usb-redir: Improve some debugging messages
  usb-redir: Try to keep our buffer size near the target size
  usb-redir: Pre-fill our isoc input buffer before sending pkts to the host
  usb-redir: Dynamically adjust iso buffering size based on ep interval
  usb-redir: Clear iso / irq error when stopping the stream
  usb: link packets to endpoints not devices
  usb: add max_packet_size to USBEndpoint
  usb/debug: add usb_ep_dump
  usb-desc: USBEndpoint support
  usb: add ifnum to USBEndpoint
  usb: add USBEndpoint
  xhci: Initial xHCI implementation
  usb: add audio device model
  usb-desc: audio endpoint support
  usb: track altsetting in USBDevice
  usb: track configuration and interface count in USBDevice.
  usb-host: rip out legacy procfs support

7 years agokvm: Activate in-kernel irqchip support
Jan Kiszka [Sat, 15 Oct 2011 11:43:48 +0000 (13:43 +0200)] 
kvm: Activate in-kernel irqchip support

Make the basic in-kernel irqchip support selectable via
-machine ...,kernel_irqchip=on. Leave it off by default until it can
fully replace user space models.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agokvm: x86: Add user space part for in-kernel IOAPIC
Jan Kiszka [Sun, 16 Oct 2011 21:25:49 +0000 (23:25 +0200)] 
kvm: x86: Add user space part for in-kernel IOAPIC

This introduces the KVM-accelerated IOAPIC model 'kvm-ioapic' and
extends the IRQ routing setup by the 0->2 redirection when needed.

The kvm-ioapic model has a property that allows to define its GSI base
for injecting interrupts into the kernel model. This will allow to
disentangle PIC and IOAPIC pins for chipsets that support more
sophisticated IRQ routes than the PIIX3. So far the base is kept at 0,
i.e. PIC and IOAPIC share pins 0..15.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agokvm: x86: Add user space part for in-kernel i8259
Jan Kiszka [Sun, 16 Oct 2011 13:30:27 +0000 (15:30 +0200)] 
kvm: x86: Add user space part for in-kernel i8259

Introduce the alternative 'kvm-i8259' device model that exploits KVM
in-kernel acceleration.

The PIIX3 initialization code is furthermore extended by KVM specific
IRQ route setup. GSI injection differs in KVM mode from the user space
model. As we can dispatch ISA-range IRQs to both IOAPIC and PIC inside
the kernel, we do not need to inject them separately. This is reflected
by a KVM-specific GSI handler.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agokvm: x86: Add user space part for in-kernel APIC
Jan Kiszka [Sun, 16 Oct 2011 11:23:26 +0000 (13:23 +0200)] 
kvm: x86: Add user space part for in-kernel APIC

This introduces the alternative APIC device which makes use of KVM's
in-kernel device model. External NMI injection via LINT1 is emulated by
checking the current state of the in-kernel APIC, only injecting a NMI
into the VCPU if LINT1 is unmasked and configured to DM_NMI.

MSI is not yet supported, so we disable this when the in-kernel model is
in use.

CC: Lai Jiangshan <laijs@cn.fujitsu.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agokvm: x86: Establish IRQ0 override control
Jan Kiszka [Sat, 15 Oct 2011 12:08:26 +0000 (14:08 +0200)] 
kvm: x86: Establish IRQ0 override control

KVM is forced to disable the IRQ0 override when we run with in-kernel
irqchip but without IRQ routing support of the kernel. Set the fwcfg
value correspondingly. This aligns us with qemu-kvm.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agokvm: Introduce core services for in-kernel irqchip support
Jan Kiszka [Sat, 15 Oct 2011 09:49:47 +0000 (11:49 +0200)] 
kvm: Introduce core services for in-kernel irqchip support

Add the basic infrastructure to active in-kernel irqchip support, inject
interrupts into these models, and maintain IRQ routes.

Routing is optional and depends on the host arch supporting
KVM_CAP_IRQ_ROUTING. When it's not available on x86, we looe the HPET as
we can't route GSI0 to IOAPIC pin 2.

In-kernel irqchip support will once be controlled by the machine
property 'kernel_irqchip', but this is not yet wired up.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agomemory: Introduce memory_region_init_reservation
Jan Kiszka [Sun, 23 Oct 2011 14:01:19 +0000 (16:01 +0200)] 
memory: Introduce memory_region_init_reservation

Introduce a memory region type that can reserve I/O space. Such regions
are useful for modeling I/O that is only handled outside of QEMU, i.e.
in the context of an accelerator like KVM.

Any access to such a region from QEMU is a bug, but could theoretically
be triggered by guest code (DMA to reserved region). So only warning
about such events once, then ignore them.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoioapic: Factor out base class for KVM reuse
Jan Kiszka [Sun, 16 Oct 2011 17:38:22 +0000 (19:38 +0200)] 
ioapic: Factor out base class for KVM reuse

Split up the IOAPIC analogously to APIC and i8259. KVM will share the
IOAPICCommonState, the vmstate, reset logic and certain init parts with
the user space model.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoioapic: Drop post-load irr initialization
Jan Kiszka [Tue, 10 Jan 2012 11:24:10 +0000 (12:24 +0100)] 
ioapic: Drop post-load irr initialization

As all devices undergo a reset prior to vmloa, and the reset value of
irr is 0, we do not need to do this clearing for older vmstates
explicitly. Dropping this redundant code will also make KVM integration
a bit simpler.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoi8259: Factor out base class for KVM reuse
Jan Kiszka [Sun, 16 Oct 2011 12:38:45 +0000 (14:38 +0200)] 
i8259: Factor out base class for KVM reuse

Analogously to the APIC, we will reuse some parts of the user space
i8259 model for KVM. The base class provides a common device state, the
vmstate, the property list, a reset core and some shared init bits.

This also introduces a common helper to instantiate a single i8259 chip
from the cascade-creating i8259_init function.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoi8259: Completely privatize PicState
Jan Kiszka [Tue, 10 Jan 2012 15:31:16 +0000 (16:31 +0100)] 
i8259: Completely privatize PicState

Use DeviceState instead of PicState in the public i8259 API. This is
cleaner and allows to reorganize the PIC data structures for KVM reuse.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoapic: Open-code timer save/restore
Jan Kiszka [Sun, 16 Oct 2011 10:19:12 +0000 (12:19 +0200)] 
apic: Open-code timer save/restore

To enable migration between accelerated and non-accelerated APIC models,
we will need to handle the timer saving and restoring specially and can
no longer rely on the automatics of VMSTATE_TIMER. Specifically,
accelerated model will not start any QEMUTimer.

This patch therefore factors out the generic bits into apic_next_timer
and use a post-load callback to implemented model-specific logic.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoapic: Factor out base class for KVM reuse
Jan Kiszka [Sun, 16 Oct 2011 09:16:36 +0000 (11:16 +0200)] 
apic: Factor out base class for KVM reuse

The KVM in-kernel APIC model will reuse parts of the user space model
while providing the same frontend view to guest and most management
interfaces.

Factor out an APIC base class to encapsulate those parts that will be
shared by user space and KVM model. This class offers callback hooks for
init, base/tpr setting, and the external NMI delivery that will be
set via APICCommonInfo structure and implemented specifically in the
subclasses.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoapic: Introduce apic_report_irq_delivered
Jan Kiszka [Tue, 13 Dec 2011 14:39:04 +0000 (15:39 +0100)] 
apic: Introduce apic_report_irq_delivered

The in-kernel i8259 and IOAPIC backends for KVM will need this, so
encapsulate the shared bits.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoapic: Inject external NMI events via LINT1
Jan Kiszka [Mon, 17 Oct 2011 16:00:06 +0000 (00:00 +0800)] 
apic: Inject external NMI events via LINT1

On real hardware, NMI button events are injected via the LINT1 line of
the APICs. E.g. kdump expect this wiring and gets upset if the per-APIC
LINT1 mask is not respected, i.e. if NMIs are injected to VCPUs that
should not receive them. Change the APIC emulation code to reflect this.

Based on qemu-kvm patch by Lai Jiangshan.

CC: Lai Jiangshan <laijs@cn.fujitsu.com>
Reported-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoapic: Stop timer on reset
Jan Kiszka [Sun, 16 Oct 2011 09:59:30 +0000 (11:59 +0200)] 
apic: Stop timer on reset

All LVTs are masked on reset, so the timer becomes ineffective. Letting
it tick nevertheless is harmless, but will at least create a spurious
trace event.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agokvm: Move kvmclock into hw/kvm folder
Jan Kiszka [Sat, 15 Oct 2011 08:01:27 +0000 (10:01 +0200)] 
kvm: Move kvmclock into hw/kvm folder

More KVM-specific devices will come, so let's start with moving the
kvmclock into a dedicated folder.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agomsi: Generalize msix_supported to msi_supported
Jan Kiszka [Sat, 15 Oct 2011 12:33:17 +0000 (14:33 +0200)] 
msi: Generalize msix_supported to msi_supported

Rename msix_supported to msi_supported and control MSI and MSI-X
activation this way. That was likely to original intention for this
flag, but MSI support came after MSI-X.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agohyper-v: initialize Hyper-V CPUID leaves.
Vadim Rozenfeld [Sun, 18 Dec 2011 20:48:14 +0000 (22:48 +0200)] 
hyper-v: initialize Hyper-V CPUID leaves.

Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
7 years agohyper-v: introduce Hyper-V support infrastructure.
Vadim Rozenfeld [Sun, 18 Dec 2011 20:48:13 +0000 (22:48 +0200)] 
hyper-v: introduce Hyper-V support infrastructure.

[Jan: fix build with CONFIG_USER_ONLY]

Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
7 years agoMakefile: Remove generated headers on clean
Andreas Färber [Tue, 17 Jan 2012 12:17:38 +0000 (13:17 +0100)] 
Makefile: Remove generated headers on clean

Running `make distclean' followed by a new out-of-tree build would fail
due to stale generated QMP headers in the tree.

Commit 611b727374ad76fb0078ea65bc1387194913980e (Makefile: remove more
generated files on clean) made sure generated sources are removed.

Also remove generated headers introduced in commit
e3193601c84558c303b1773379da76fce80c0a56 (qapi: use middle mode in QMP
server).

Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Luiz Capitulino <lcapitulino@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
7 years agoMakefile: Exclude tests/Makefile in unconfigured tree
Andreas Färber [Tue, 17 Jan 2012 12:16:05 +0000 (13:16 +0100)] 
Makefile: Exclude tests/Makefile in unconfigured tree

Since commit dbfe06c62ccedc5b64e1c6466445133dd50f6de1 (build:
split unit test builds to a separate makefile fragment),
in absence of config-host.mak an undefined $(SRC_PATH) breaks
`make distclean' due to /tests/Makefile not being include'able.

Fix by only including when config-host.mak is present.

Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Cc: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
7 years agolm32: Fix mixup of uint32 and uint32_t
Andreas Färber [Tue, 17 Jan 2012 09:44:40 +0000 (10:44 +0100)] 
lm32: Fix mixup of uint32 and uint32_t

Commit d23948b15a9920fb7f6374b55a6db1ecff81f3ee (lm32: add Milkymist
VGAFB support) introduced a stray usage of the softfloat uint32 type.

Use uint32_t instead.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael Walle <michael@walle.cc>
Cc: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
7 years agotests: Silence gtester in Makefile
Stefan Weil [Mon, 16 Jan 2012 06:26:27 +0000 (07:26 +0100)] 
tests: Silence gtester in Makefile

This prettifies make output a little by avoiding a very long line.
As gtester prints the checks when they are run, no information is lost.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
7 years agoqemu-tool: Fix mixup of int64 and int64_t
Andreas Färber [Mon, 16 Jan 2012 00:46:52 +0000 (01:46 +0100)] 
qemu-tool: Fix mixup of int64 and int64_t

Commit cbcfa0418f0c196afa765f5c9837b9344d1adcf3 (link the main loop and
its dependencies into the tools) introduced stray usages of int64.

Use int64_t instead.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
7 years agoblock: use proper qerrors in qmp_block_resize
Stefan Hajnoczi [Wed, 4 Jan 2012 22:23:34 +0000 (22:23 +0000)] 
block: use proper qerrors in qmp_block_resize

Let's report specific errors so that management tools and users can
identify the problem.

Two new qerrors are needed:
 * QERR_DEVICE_HAS_NO_MEDIUM for ENOMEDIUM
 * QERR_DEVICE_IS_READ_ONLY for EACCES

Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
7 years agoqerror: restore alphabetical order over qerrors
Stefan Hajnoczi [Wed, 4 Jan 2012 17:38:22 +0000 (17:38 +0000)] 
qerror: restore alphabetical order over qerrors

Over time these must have gotten out of order.  Put everything back in
alphabetical order.

This is purely a clean up.  In practice nothing depends on the order.

Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
7 years agoqerror: add check-qerror.sh to verify alphabetical order
Stefan Hajnoczi [Wed, 4 Jan 2012 22:23:32 +0000 (22:23 +0000)] 
qerror: add check-qerror.sh to verify alphabetical order

We're supposed to keep qerror definitions and table entries in
alphabetical order.  In practice this is not checked.

I haven't found a nice way to integrate this into the makefile yet but
we can at least have this script which verifies that qerrors are in
alphabetical order.

Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
7 years agoqmp: Add missing gcc format attribute and fix format string
Stefan Weil [Fri, 23 Dec 2011 19:34:38 +0000 (20:34 +0100)] 
qmp: Add missing gcc format attribute and fix format string

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
7 years agoqapi: Convert block_set_io_throttle
Luiz Capitulino [Wed, 14 Dec 2011 18:49:14 +0000 (16:49 -0200)] 
qapi: Convert block_set_io_throttle

Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
7 years agoqapi: Convert change
Luiz Capitulino [Thu, 8 Dec 2011 13:13:50 +0000 (11:13 -0200)] 
qapi: Convert change

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
7 years agoqerror: Extend QERR_DEVICE_ENCRYPTED
Luiz Capitulino [Tue, 13 Dec 2011 19:18:30 +0000 (17:18 -0200)] 
qerror: Extend QERR_DEVICE_ENCRYPTED

Include the name of the encrypted file.

Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
7 years agoqapi: Introduce change-vnc-password
Luiz Capitulino [Thu, 8 Dec 2011 13:45:55 +0000 (11:45 -0200)] 
qapi: Introduce change-vnc-password

New QMP command to change the VNC password.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
7 years agomonitor: expose readline state
Anthony Liguori [Fri, 2 Sep 2011 17:34:50 +0000 (12:34 -0500)] 
monitor: expose readline state

HMP is now implemented in terms of QMP.  The monitor has a bunch of logic to
deal with HMP right now like readline support.  Export it from the monitor so
we can consume it in hmp.c.

In short time, hmp.c will take over all of the readline bits.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
7 years agoqapi: Convert eject
Luiz Capitulino [Wed, 7 Dec 2011 18:02:36 +0000 (16:02 -0200)] 
qapi: Convert eject

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
7 years agoblock: eject_device(): Use error_set()
Luiz Capitulino [Wed, 7 Dec 2011 17:47:23 +0000 (15:47 -0200)] 
block: eject_device(): Use error_set()

Also drops the leftover 'mon' argument.

This is a preparation for the next commits which will port the
eject and change commands to the QAPI.

Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
7 years agoqapi: Convert expire_password
Luiz Capitulino [Wed, 7 Dec 2011 13:47:57 +0000 (11:47 -0200)] 
qapi: Convert expire_password

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
7 years agoqapi: Convert set_password
Luiz Capitulino [Wed, 7 Dec 2011 13:17:51 +0000 (11:17 -0200)] 
qapi: Convert set_password

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
7 years agovnc: Simplify vnc_display_password()
Luiz Capitulino [Wed, 7 Dec 2011 12:19:10 +0000 (10:19 -0200)] 
vnc: Simplify vnc_display_password()

Drop the qerror_report() call from it and let its callers set the error
themselves. This also allows for dropping the 'ret' variable.

Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
7 years agoqxl: Slot sanity check in qxl_phys2virt() is off by one, fix
Markus Armbruster [Fri, 4 Nov 2011 09:34:24 +0000 (10:34 +0100)] 
qxl: Slot sanity check in qxl_phys2virt() is off by one, fix

Spotted by Coverity.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
7 years agoarm: make the number of GIC interrupts configurable
Mark Langsdorf [Tue, 17 Jan 2012 10:54:07 +0000 (10:54 +0000)] 
arm: make the number of GIC interrupts configurable

Increase the maximum number of GIC interrupts for a9mp and a11mp to 1020,
and create a configurable property for each defaulting to 96 and 64
(respectively) so that device modelers can set the value appropriately
for their SoC. Other ARM processors also set their maximum number of
used IRQs appropriately.

Set the maximum theoretical number of GIC interrupts to 1020 and
update the save/restore code to only use the appropriate number for
each SoC.

Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
[Peter Maydell: fixed minor whitespace snafu]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agohw/lan9118: Add save/load support
Peter Maydell [Tue, 17 Jan 2012 10:54:07 +0000 (10:54 +0000)] 
hw/lan9118: Add save/load support

Implement save/load for the LAN9118.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
7 years agoarm: Remove incorrect comment in arm_timer
Mark Langsdorf [Tue, 17 Jan 2012 10:54:07 +0000 (10:54 +0000)] 
arm: Remove incorrect comment in arm_timer

The current comment says that the arm_timers are restricted to between
32 KHz and 1 MHz, but sp804 TRM does not specify those limits.

Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agovexpress, realview: Add (dummy) L2 cache controller
Peter Maydell [Tue, 17 Jan 2012 10:54:07 +0000 (10:54 +0000)] 
vexpress, realview: Add (dummy) L2 cache controller

Instantiate the L2 cache controller on the ARM devboards which have one,
since we have a dummy model of it now. Note that the only non-MP board
with an L2x0 is the PB1176, which we don't model.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agousb-redir: Improve some debugging messages
Hans de Goede [Tue, 10 Jan 2012 13:13:08 +0000 (14:13 +0100)] 
usb-redir: Improve some debugging messages

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
7 years agousb-redir: Try to keep our buffer size near the target size
Hans de Goede [Tue, 10 Jan 2012 13:13:07 +0000 (14:13 +0100)] 
usb-redir: Try to keep our buffer size near the target size

Before this patch we would allow the (iso) buffer to grow unlimited
(and it would under certain circumstances) leading to way too high
latencies for iso data streams.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
7 years agousb-redir: Pre-fill our isoc input buffer before sending pkts to the host
Hans de Goede [Tue, 10 Jan 2012 13:13:06 +0000 (14:13 +0100)] 
usb-redir: Pre-fill our isoc input buffer before sending pkts to the host

This is something which should have been done from the first version of
usb-redir, but wasn't.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
7 years agousb-redir: Dynamically adjust iso buffering size based on ep interval
Hans de Goede [Tue, 10 Jan 2012 13:13:05 +0000 (14:13 +0100)] 
usb-redir: Dynamically adjust iso buffering size based on ep interval

Note the bufpq_target_size id stored in the endpoint info struct,
even though it only used once. This is done because it will be
referenced from other code in a follow up patch.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
7 years agousb-redir: Clear iso / irq error when stopping the stream
Hans de Goede [Tue, 10 Jan 2012 13:13:04 +0000 (14:13 +0100)] 
usb-redir: Clear iso / irq error when stopping the stream

And ignore status messages from the client which arrive after stream
stop (the stream stop send to the client and an error status reported by
the client my cross each other due to network latency).

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>