qemu.git
7 years agotarget-ppc: Introduce powerisa-207-server flag
Alexey Kardashevskiy [Fri, 7 Mar 2014 04:37:39 +0000 (15:37 +1100)] 
target-ppc: Introduce powerisa-207-server flag

This flag will be used to decide whether to emulate some bits of
H_SET_MODE hypercall because some are POWER8-only.

While we are here, add 2.05 flag to POWER8 family too. POWER7/7+ already
have it.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
7 years agotarget-ppc: Force CPU threads count to be a power of 2
Bharata B Rao [Wed, 5 Mar 2014 08:32:36 +0000 (14:02 +0530)] 
target-ppc: Force CPU threads count to be a power of 2

PowerPC kernel expects the number of SMT threads in a core to be a power
of 2. Since QEMU doesn't enforce this, it leads to an early guest kernel
crash if invalid threads count is specified.

Prevent this crash and make it a graceful exit from QEMU itself by
validating the user-supplied threads count.

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
7 years agotarget-ppc: Fix overallocation of opcode tables
Stuart Brady [Wed, 19 Mar 2014 14:07:26 +0000 (14:07 +0000)] 
target-ppc: Fix overallocation of opcode tables

create_new_table() should allocate 0x20 opc_handler_t pointers, but
actually allocates 0x20 opc_handler_t structs.  Fix this.

Signed-off-by: Stuart Brady <sdb@zubnet.me.uk>
Reviewed-by: Tom Musta <tommusta@gmail.com>
Tested-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
7 years agotarget-ppc: Reset SPRs on CPU reset
Alexey Kardashevskiy [Wed, 19 Mar 2014 13:03:57 +0000 (00:03 +1100)] 
target-ppc: Reset SPRs on CPU reset

This resets SPR values to defaults on CPU reset. This should help
with little-endian guests reboot issues.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
7 years agospapr_hcall: Fix h_enter to loop correctly
Aneesh Kumar K.V [Fri, 14 Mar 2014 13:51:49 +0000 (19:21 +0530)] 
spapr_hcall: Fix h_enter to loop correctly

We wanted to loop till index is 8. On 8 we return with H_PTEG_FULL. If we
are successful in loading hpte with any other index, we continue with that
index value.

Reported-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
7 years agotarget-ppc: Add missing 'static' and 'const' attributes
Stefan Weil [Sun, 16 Mar 2014 13:49:54 +0000 (14:49 +0100)] 
target-ppc: Add missing 'static' and 'const' attributes

This fixes warnings from the static code analysis (smatch).

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Andreas Färber <afaerber@suse.de>
7 years agoMerge remote-tracking branch 'remotes/riku/linux-user-for-upstream' into staging
Peter Maydell [Wed, 19 Mar 2014 14:14:15 +0000 (14:14 +0000)] 
Merge remote-tracking branch 'remotes/riku/linux-user-for-upstream' into staging

* remotes/riku/linux-user-for-upstream:
  linux-user: Implement capget, capset
  linux-user: Don't allow guest to block SIGSEGV
  signal: added a wrapper for sigprocmask function
  linux-user: Don't reserve space for commpage for AArch64
  linux-user: implement F_[GS]ETOWN_EX
  linux-user: Don't return uninitialized value for atomic_barrier syscall
  linux-user/signal.c: Correct error path for AArch64 do_rt_sigreturn

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agoMerge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
Peter Maydell [Wed, 19 Mar 2014 13:47:22 +0000 (13:47 +0000)] 
Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging

Block patches for 2.0.0-rc1

# gpg: Signature made Wed 19 Mar 2014 13:03:27 GMT using RSA key ID C88F2FD6
# gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>"

* remotes/kevin/tags/for-upstream:
  dataplane: fix implicit IOThread refcount
  block/nfs: report errors from libnfs
  block/nfs: bump libnfs requirement to 1.9.3
  qcow2: Fix fail path in realloc_refcount_block()
  qcow2: Correct comment for realloc_refcount_block()
  qemu-io: Extended "--cmd" description in usage text
  qemu-io-cmds: Fixed typo in example for writev.
  block: Add error handling to bdrv_invalidate_cache()

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agoMerge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140319' into...
Peter Maydell [Wed, 19 Mar 2014 13:00:41 +0000 (13:00 +0000)] 
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140319' into staging

target-arm queue:
 * last few A64 Neon instructions
 * fix some PL011 UART bugs causing occasional serial lockups
 * fix the non-PCI AHCI device

# gpg: Signature made Wed 19 Mar 2014 12:00:59 GMT using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"

* remotes/pmaydell/tags/pull-target-arm-20140319:
  target-arm: A64: Add saturating accumulate ops (USQADD/SUQADD)
  target-arm: A64: Add saturating int ops (SQNEG/SQABS)
  pl011: fix incorrect logic to set the RXFF flag
  pl011: fix UARTRSR accesses corrupting the UARTCR value
  pl011: reset the fifo when enabled or disabled
  ahci: fix sysbus support

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agodataplane: fix implicit IOThread refcount
Stefan Hajnoczi [Tue, 18 Mar 2014 16:50:52 +0000 (17:50 +0100)] 
dataplane: fix implicit IOThread refcount

When creating an IOThread implicitly (the user did not specify
x-iothread=<id>) remember that iothread_find() does not return the
object with an incremented refcount.

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Fam Zheng <famz@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
7 years agoblock/nfs: report errors from libnfs
Peter Lieven [Mon, 17 Mar 2014 08:37:21 +0000 (09:37 +0100)] 
block/nfs: report errors from libnfs

if an NFS operation fails we should report what libnfs knows
about the failure. It is likely more than just an error code.

Signed-off-by: Peter Lieven <pl@kamp.de>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
7 years agoblock/nfs: bump libnfs requirement to 1.9.3
Peter Lieven [Mon, 17 Mar 2014 08:37:33 +0000 (09:37 +0100)] 
block/nfs: bump libnfs requirement to 1.9.3

libnfs prior to 1.9.3 contains a bug that will report
wrong transfer sizes if the file offset grows beyond 4GB
and RPC responses are received out of order. this
error is not detectable and fixable in qemu.

additionally 1.9.3 introduces support for handling short
read/writes in general and takes care of the necessary
retransmissions internally.

Signed-off-by: Peter Lieven <pl@kamp.de>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
7 years agoqcow2: Fix fail path in realloc_refcount_block()
Max Reitz [Mon, 17 Mar 2014 22:04:52 +0000 (23:04 +0100)] 
qcow2: Fix fail path in realloc_refcount_block()

If qcow2_alloc_clusters() fails, new_offset and ret will both be
negative after the fail label, thus passing the first if condition and
subsequently resulting in a call of qcow2_free_clusters() with an
invalid (negative) offset parameter. Fix this by introducing a new label
"fail_free_cluster" which is only invoked if new_offset is indeed
pointing to a newly allocated cluster that should be cleaned up by
freeing it.

While we're at it, clean up the whole fail path. qcow2_cache_put()
should (and actually can) never fail, hence the return value can safely
be ignored (aside from asserting that it indeed did not fail).

Furthermore, there is no reason to give QCOW2_DISCARD_ALWAYS to
qcow2_free_clusters(), a mere QCOW2_DISCARD_OTHER will suffice.

Ultimately, rename the "fail" label to "done", as it is invoked both on
failure and success.

Suggested-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Max Reitz <mreitz@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
7 years agoqcow2: Correct comment for realloc_refcount_block()
Max Reitz [Mon, 17 Mar 2014 22:04:51 +0000 (23:04 +0100)] 
qcow2: Correct comment for realloc_refcount_block()

Contrary to the comment describing this function's behavior, it does not
return 0 on success, but rather the offset of the newly allocated
cluster. This patch adjusts the comment accordingly to reflect the
actual behavior.

Signed-off-by: Max Reitz <mreitz@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
7 years agoqemu-io: Extended "--cmd" description in usage text
Maria Kustova [Tue, 18 Mar 2014 05:59:19 +0000 (09:59 +0400)] 
qemu-io: Extended "--cmd" description in usage text

It's not clear from the usage description that "--cmd" option accepts
its argument as a string, so any special symbols have to be quoted from
the shell.

Updates in usage text:
 - Specified parameter format for "--cmd" option.
 - Added an instruction how to get help for "--cmd" option.

Signed-off-by: Maria Kustova <maria.k@catit.be>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
7 years agoqemu-io-cmds: Fixed typo in example for writev.
Maria Kustova [Tue, 18 Mar 2014 05:59:17 +0000 (09:59 +0400)] 
qemu-io-cmds: Fixed typo in example for writev.

Signed-off-by: Maria Kustova <maria.k@catit.be>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
7 years agoblock: Add error handling to bdrv_invalidate_cache()
Kevin Wolf [Wed, 12 Mar 2014 14:59:16 +0000 (15:59 +0100)] 
block: Add error handling to bdrv_invalidate_cache()

If it returns an error, the migrated VM will not be started, but qemu
exits with an error message.

Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Benoit Canet <benoit@irqsave.net>
7 years agotarget-arm: A64: Add saturating accumulate ops (USQADD/SUQADD)
Alex Bennée [Tue, 18 Mar 2014 23:10:06 +0000 (23:10 +0000)] 
target-arm: A64: Add saturating accumulate ops (USQADD/SUQADD)

Add the saturating accumulate operations USQADD and SUQADD
to the A64 instruction set. This completes coverage of A64 Neon.
These operations (which are unsigned + signed -> signed and
signed + unsigned -> unsigned) don't exist in the A32/T32
instruction set, so require a complete new set of helper functions.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
7 years agotarget-arm: A64: Add saturating int ops (SQNEG/SQABS)
Alex Bennée [Tue, 18 Mar 2014 23:10:06 +0000 (23:10 +0000)] 
target-arm: A64: Add saturating int ops (SQNEG/SQABS)

This mostly re-uses the existing NEON helpers with an additional two for
the 64 bit case. I also took the opportunity to add TCG_CALL_NO_RWG
options to the helpers as they don't modify globals (saturation flags
are in the CPU Environment).

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
7 years agopl011: fix incorrect logic to set the RXFF flag
Rob Herring [Tue, 18 Mar 2014 18:18:41 +0000 (13:18 -0500)] 
pl011: fix incorrect logic to set the RXFF flag

The receive fifo full bit should be set when 1 character is received and
the fifo is disabled or when 16 characters are in the fifo.

Signed-off-by: Rob Herring <rob.herring@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1395166721-15716-4-git-send-email-robherring2@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agopl011: fix UARTRSR accesses corrupting the UARTCR value
Rob Herring [Tue, 18 Mar 2014 18:18:40 +0000 (13:18 -0500)] 
pl011: fix UARTRSR accesses corrupting the UARTCR value

Offset 4 is UARTRSR/UARTECR, not the UARTCR. The UARTCR would be
corrupted if the UARTRSR is ever written. Fix by implementing a correct
model of the UARTRSR/UARTECR register. Reads of this register simply
reflect the error bits in data register. Only breaks can be triggered in
QEMU. With the pl011_can_receive function, we effectively have flow
control between the host and the model. Framing and parity errors simply
don't make sense in the model and will never occur.

Signed-off-by: Rob Herring <rob.herring@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1395166721-15716-3-git-send-email-robherring2@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agopl011: reset the fifo when enabled or disabled
Rob Herring [Tue, 18 Mar 2014 18:18:39 +0000 (13:18 -0500)] 
pl011: reset the fifo when enabled or disabled

Intermittent issues have been seen where no serial input occurs. It
appears the pl011 gets in a state where the rx interrupt never fires
because the rx interrupt only asserts when crossing the fifo trigger
level. The fifo state appears to get out of sync when the pl011 is
re-configured. This combined with the rx timeout interrupt not being
modeled results in no more rx interrupts.

Disabling the fifo is the recommended way to clear the tx fifo in the
TRM (section 3.3.8). The behavior in this case for the rx fifo is
undefined in the TRM, but having fifo contents to be maintained during
configuration changes is not likely expected behavior. Reseting the
fifo state when the fifo size is changed is the simplest solution.

Signed-off-by: Rob Herring <rob.herring@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1395166721-15716-2-git-send-email-robherring2@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agoahci: fix sysbus support
Rob Herring [Tue, 18 Mar 2014 19:36:13 +0000 (19:36 +0000)] 
ahci: fix sysbus support

Non-PCI AHCI support is broken due to assertion failures when trying
to convert AHCIState to a PCIDevice pointer as AHCIState can have
different container structs. Fix this by using the non-asserting object
cast and checking the returned pointer is not NULL.

The AddressSpace pointer is also being initialized to NULL and causing
dma_memory_map call to fail. Fix this by initializing to
address_space_memory for sysbus instances.

Also correct AHCI_VMSTATE to use the correct container SysbusAHCIState
for sysbus instances.

Signed-off-by: Rob Herring <rob.herring@linaro.org>
Message-id: 1392073373-3295-1-git-send-email-robherring2@gmail.com
[PMM: added linebreaks to fix overlong lines]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agoMerge remote-tracking branch 'remotes/kraxel/tags/pull-vnc-2' into staging
Peter Maydell [Tue, 18 Mar 2014 16:39:29 +0000 (16:39 +0000)] 
Merge remote-tracking branch 'remotes/kraxel/tags/pull-vnc-2' into staging

vnc: fix vmware VGA incompatiblities

# gpg: Signature made Tue 18 Mar 2014 07:23:10 GMT using RSA key ID D3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>"

* remotes/kraxel/tags/pull-vnc-2:
  ui/vnc: fix vmware VGA incompatiblities

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agoMerge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140317' into...
Peter Maydell [Tue, 18 Mar 2014 14:31:42 +0000 (14:31 +0000)] 
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140317' into staging

target-arm queue:
 * more A64 Neon instructions
 * fixes to reset CBAR values for A9 and A15 boards
 * fix accesses to PMCR register in -icount mode

# gpg: Signature made Mon 17 Mar 2014 22:04:52 GMT using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"

* remotes/pmaydell/tags/pull-target-arm-20140317: (30 commits)
  scripts/qemu-binfmt-conf.sh: Add AArch64 registration
  target-arm: A64: Add [UF]RSQRTE (reciprocal root estimate)
  target-arm: A64: Implement FCVTXN
  target-arm: A64: Implement scalar saturating narrow ops
  target-arm: A64: Move handle_2misc_narrow function
  target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPE
  softfloat: export squash_input_denormal functions
  target-arm: A64: Implement FCVTZS, FCVTZU in the shift-imm categories
  target-arm: A64: Handle saturating left shifts SQSHL, SQSHLU, UQSHL
  exec-all.h: Increase MAX_OP_PER_INSTR for ARM A64 decoder
  target-arm: A64: Implement FRINT*
  target-arm: A64: Implement SRI
  target-arm: A64: Add FRECPX (reciprocal exponent)
  target-arm: A64: List unsupported shift-imm opcodes
  target-arm: A64: Implement FCVTL
  target-arm: A64: Implement FCVTN
  target-arm: A64: Implement FCVT[NMAPZ][SU] SIMD instructions
  target-arm: A64: Implement SHLL, SHLL2
  target-arm: A64: Implement SADDLP, UADDLP, SADALP, UADALP
  target-arm: A64: Saturating and narrowing shift ops
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agoui/vnc: fix vmware VGA incompatiblities
Peter Lieven [Mon, 17 Mar 2014 17:38:58 +0000 (18:38 +0100)] 
ui/vnc: fix vmware VGA incompatiblities

this fixes invalid rectangle updates observed after commit 12b316d
with the vmware VGA driver. The issues occured because the server
and client surface update seems to be out of sync at some points
and the max width of the surface is not dividable by
VNC_DIRTY_BITS_PER_PIXEL (16).

Reported-by: Serge Hallyn <serge.hallyn@ubuntu.com>
Signed-off-by: Peter Lieven <pl@kamp.de>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
7 years agoMerge remote-tracking branch 'remotes/borntraeger/tags/kvm-s390-20140317' into staging
Peter Maydell [Mon, 17 Mar 2014 22:31:32 +0000 (22:31 +0000)] 
Merge remote-tracking branch 'remotes/borntraeger/tags/kvm-s390-20140317' into staging

4 small patches:
- Fixing findings of valgrind regarding minor memory leaks:
  Currently we forget the pointer of qemu_allocate_irqs. Since we never
  free the irqs, this is not critical, but obviously not good programming
  style. While we are at it, we dont need the irq infrastructure for
  the sclp consoles.
- Handle new ELF error codes for BIOS loading

# gpg: Signature made Mon 17 Mar 2014 21:34:12 GMT using RSA key ID B5A61C7C
# gpg: Can't check signature: public key not found

* remotes/borntraeger/tags/kvm-s390-20140317:
  s390x/sclpconsole-lm: Fix and simplify irq setup
  s390x/sclpconsole: Fix and simplify interrupt injection
  s390x/cpu hotplug: Fix memory leak
  s390/ipl: Fix error path on BIOS loading

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agoMerge remote-tracking branch 'remotes/rth/tcg-v8p-2' into staging
Peter Maydell [Mon, 17 Mar 2014 22:15:52 +0000 (22:15 +0000)] 
Merge remote-tracking branch 'remotes/rth/tcg-v8p-2' into staging

* remotes/rth/tcg-v8p-2:
  tcg-sparc: Convert to new ldst opcodes
  tcg-sparc: Convert to new ldst helpers
  tcg-sparc: Tidy tcg_out_tlb_load interface
  tcg-sparc: Use TCGMemOp within qemu_ldst routines
  tcg-sparc: Improve tcg_out_movi
  tcg-sparc: Dont handle constant arguments to ext32 ops
  tcg-sparc: Don't handle remainder
  tcg-sparc: Use intptr_t as appropriate
  tcg-sparc: Tidy call+jump patterns
  tcg-sparc: Fix tlb read
  tcg-sparc: Fix ld64 for 32-bit mode

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agos390x/sclpconsole-lm: Fix and simplify irq setup
Christian Borntraeger [Mon, 10 Mar 2014 13:19:52 +0000 (14:19 +0100)] 
s390x/sclpconsole-lm: Fix and simplify irq setup

valgrind complains about a memory leak in irq setup of sclpconsole:

==42117== 8 bytes in 1 blocks are definitely lost in loss record 89of 833
==42117==    at 0x4031AFE: malloc (vg_replace_malloc.c:292)
==42117==    by 0x8022F855: malloc_and_trace (vl.c:2715)
==42117==    by 0x4145569: g_malloc (in /usr/lib64/libglib-2.0.so.0.3400.2)
==42117==    by 0x800F696D: qemu_extend_irqs (irq.c:51)
==42117==    by 0x800F6AF7: qemu_allocate_irqs (irq.c:68)
==42117==    by 0x800F5685: console_init (sclpconsole.c:235)
==42117==    by 0x80297C79: event_realize (event-facility.c:386)
==42117==    by 0x80105071: device_set_realized (qdev.c:693)
==42117==    by 0x801CDC4B: property_set_bool (object.c:1337)
 ==42117==    by 0x801CBD7F: object_property_set (object.c:819)
[...]

We dont need the indirection of an qemu irq to inject an slcp interrupt.
Fixes a valgrind error and makes the code simpler.

Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Acked-by: Heinz Graalfs <graalfs@linux.vnet.ibm.com>
7 years agos390x/sclpconsole: Fix and simplify interrupt injection
Christian Borntraeger [Mon, 10 Mar 2014 13:17:04 +0000 (14:17 +0100)] 
s390x/sclpconsole: Fix and simplify interrupt injection

valgrind complains about a memory leak in irq setup of sclpconsole:

==42117== 8 bytes in 1 blocks are definitely lost in loss record 89 of 833
==42117==    at 0x4031AFE: malloc (vg_replace_malloc.c:292)
==42117==    by 0x8022F855: malloc_and_trace (vl.c:2715)
==42117==    by 0x4145569: g_malloc (in /usr/lib64/libglib-2.0.so.0.3400.2)
==42117==    by 0x800F696D: qemu_extend_irqs (irq.c:51)
==42117==    by 0x800F6AF7: qemu_allocate_irqs (irq.c:68)
==42117==    by 0x800F5685: console_init (sclpconsole.c:235)
==42117==    by 0x80297C79: event_realize (event-facility.c:386)
==42117==    by 0x80105071: device_set_realized (qdev.c:693)
==42117==    by 0x801CDC4B: property_set_bool (object.c:1337)
==42117==    by 0x801CBD7F: object_property_set (object.c:819)
[...]

Turns out that we actually dont need the indirection, so trigger the
sclp interrupt directly.

Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Acked-by: Heinz Graalfs <graalfs@linux.vnet.ibm.com>
7 years agos390x/cpu hotplug: Fix memory leak
Christian Borntraeger [Mon, 10 Mar 2014 14:03:16 +0000 (15:03 +0100)] 
s390x/cpu hotplug: Fix memory leak

valgrind complains about the following:
==42117== 8 bytes in 1 blocks are definitely lost in loss record 88 of 833
==42117==    at 0x4031AFE: malloc (vg_replace_malloc.c:292)
==42117==    by 0x8022F855: malloc_and_trace (vl.c:2715)
==42117==    by 0x4145569: g_malloc (in /usr/lib64/libglib-2.0.so.0.3400.2)
==42117==    by 0x800F696D: qemu_extend_irqs (irq.c:51)
==42117==    by 0x800F6AF7: qemu_allocate_irqs (irq.c:68)
==42117==    by 0x8029FA4B: irq_cpu_hotplug_init (sclpcpu.c:84)
==42117==    by 0x80297C79: event_realize (event-facility.c:386)
==42117==    by 0x80105071: device_set_realized (qdev.c:693)
[...]

Right it is. Don't drop the pointer of the irq.

Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Reviewed-by: Jason J. Herne <jjherne@us.ibm.com>
7 years agos390/ipl: Fix error path on BIOS loading
Christian Borntraeger [Fri, 14 Mar 2014 12:38:57 +0000 (13:38 +0100)] 
s390/ipl: Fix error path on BIOS loading

commit 18674b26788a9e47f1157170234e32ece2044367
(elf-loader: add more return codes) enabled the elf loader to return
other errors than -1.

Lets also handle that case for our "BIOS" on s390.

Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
CC: Alexey Kardashevskiy <aik@ozlabs.ru>
CC: Alexander Graf <agraf@suse.de>
7 years agotcg-sparc: Convert to new ldst opcodes
Richard Henderson [Tue, 10 Sep 2013 02:51:21 +0000 (19:51 -0700)] 
tcg-sparc: Convert to new ldst opcodes

Signed-off-by: Richard Henderson <rth@twiddle.net>
7 years agotcg-sparc: Convert to new ldst helpers
Richard Henderson [Wed, 5 Mar 2014 17:42:08 +0000 (09:42 -0800)] 
tcg-sparc: Convert to new ldst helpers

All of the helpers with the explicit big/little endian option
require the return address as a parameter.  Acquire this via
a trampoline.

Move the load of areg0 into the trampoline.

Signed-off-by: Richard Henderson <rth@twiddle.net>
7 years agotcg-sparc: Tidy tcg_out_tlb_load interface
Richard Henderson [Fri, 6 Sep 2013 22:01:14 +0000 (15:01 -0700)] 
tcg-sparc: Tidy tcg_out_tlb_load interface

Pass address registers explicitly, rather than as indicies of args[].
It's two argument registers either way.  Use more TCGReg as appropriate.

Signed-off-by: Richard Henderson <rth@twiddle.net>
7 years agotcg-sparc: Use TCGMemOp within qemu_ldst routines
Richard Henderson [Wed, 4 Sep 2013 03:12:01 +0000 (20:12 -0700)] 
tcg-sparc: Use TCGMemOp within qemu_ldst routines

Signed-off-by: Richard Henderson <rth@twiddle.net>
7 years agotcg-sparc: Improve tcg_out_movi
Richard Henderson [Tue, 10 Sep 2013 04:07:09 +0000 (21:07 -0700)] 
tcg-sparc: Improve tcg_out_movi

If bits 31:13 are zero, reduce the insn count by one.

Signed-off-by: Richard Henderson <rth@twiddle.net>
7 years agotcg-sparc: Dont handle constant arguments to ext32 ops
Richard Henderson [Tue, 4 Mar 2014 23:24:04 +0000 (15:24 -0800)] 
tcg-sparc: Dont handle constant arguments to ext32 ops

Signed-off-by: Richard Henderson <rth@twiddle.net>
7 years agotcg-sparc: Don't handle remainder
Richard Henderson [Wed, 21 Aug 2013 02:22:15 +0000 (19:22 -0700)] 
tcg-sparc: Don't handle remainder

The generic fallback is exactly what we implemented.

Signed-off-by: Richard Henderson <rth@twiddle.net>
7 years agotcg-sparc: Use intptr_t as appropriate
Richard Henderson [Wed, 21 Aug 2013 01:31:45 +0000 (18:31 -0700)] 
tcg-sparc: Use intptr_t as appropriate

Signed-off-by: Richard Henderson <rth@twiddle.net>
7 years agotcg-sparc: Tidy call+jump patterns
Richard Henderson [Wed, 21 Aug 2013 01:25:38 +0000 (18:25 -0700)] 
tcg-sparc: Tidy call+jump patterns

Signed-off-by: Richard Henderson <rth@twiddle.net>
7 years agotcg-sparc: Fix tlb read
Richard Henderson [Sat, 7 Sep 2013 00:19:12 +0000 (17:19 -0700)] 
tcg-sparc: Fix tlb read

We were computing the full address into %o0 and then not using it.
Adjust some of the computation to rely less on having to pull immediate
values into registers.

Signed-off-by: Richard Henderson <rth@twiddle.net>
7 years agotcg-sparc: Fix ld64 for 32-bit mode
Richard Henderson [Fri, 6 Sep 2013 21:20:00 +0000 (14:20 -0700)] 
tcg-sparc: Fix ld64 for 32-bit mode

Since were not using an annulled branch, we need to put a nop
in the delay slot.

Signed-off-by: Richard Henderson <rth@twiddle.net>
7 years agoscripts/qemu-binfmt-conf.sh: Add AArch64 registration
Peter Maydell [Mon, 17 Mar 2014 16:31:53 +0000 (16:31 +0000)] 
scripts/qemu-binfmt-conf.sh: Add AArch64 registration

Add the binfmt-misc magic needed to register QEMU for handling AArch64
ELF binaries.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-26-git-send-email-peter.maydell@linaro.org

7 years agotarget-arm: A64: Add [UF]RSQRTE (reciprocal root estimate)
Alex Bennée [Mon, 17 Mar 2014 16:31:53 +0000 (16:31 +0000)] 
target-arm: A64: Add [UF]RSQRTE (reciprocal root estimate)

This adds support for [UF]RSQRTE instructions. It utilises the existing
NEON helpers with some changes. The changes include an explicit passing
of fpstatus (so the correct one is used between arm32 and aarch64),
denormilzation, more correct error handling and also proper scaling of
the fraction going into the estimate.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-25-git-send-email-peter.maydell@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agotarget-arm: A64: Implement FCVTXN
Peter Maydell [Mon, 17 Mar 2014 16:31:53 +0000 (16:31 +0000)] 
target-arm: A64: Implement FCVTXN

Implement the FCVTXN operation, which does a narrowing fp precision
conversion using the "round to odd" (von Neumann) mode. This can
conveniently be implemented as "do operation using round to zero;
then set the LSB of the mantissa to 1 if the Inexact flag was set".

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-24-git-send-email-peter.maydell@linaro.org

7 years agotarget-arm: A64: Implement scalar saturating narrow ops
Alex Bennée [Mon, 17 Mar 2014 16:31:52 +0000 (16:31 +0000)] 
target-arm: A64: Implement scalar saturating narrow ops

This completes the set of integer narrowing saturating ops including:
     SQXTN, SQXTN2
     SQXTUN, SQXTUN2
     UQXTN, UQXTN2

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-23-git-send-email-peter.maydell@linaro.org

7 years agotarget-arm: A64: Move handle_2misc_narrow function
Alex Bennée [Mon, 17 Mar 2014 16:31:52 +0000 (16:31 +0000)] 
target-arm: A64: Move handle_2misc_narrow function

Move the handle_2misc_narrow() function up the file so that it can
be called from disas_simd_scalar_two_reg_misc().

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-22-git-send-email-peter.maydell@linaro.org

7 years agotarget-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPE
Alex Bennée [Mon, 17 Mar 2014 16:31:52 +0000 (16:31 +0000)] 
target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPE

Implement URECPE and FRECPE instructions in both scalar and vector forms.
The actual reciprocal estimate function is shared with the A32/T32 Neon
code. However in A64 we aren't using the Neon "standard FPSCR value"
so extra checks are necessary to handle non-squashed denormal inputs
which can never happen for A32/T32. Calling conventions for the helpers
are thus modified to pass the fpst directly; we mark the helpers as
TCG_CALL_NO_RWG since we're changing the declarations anyway.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-21-git-send-email-peter.maydell@linaro.org

7 years agosoftfloat: export squash_input_denormal functions
Alex Bennée [Mon, 17 Mar 2014 16:31:51 +0000 (16:31 +0000)] 
softfloat: export squash_input_denormal functions

I need these available outside of softfloat for some of the reciprocal
processing in aarch64 helper functions.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-20-git-send-email-peter.maydell@linaro.org

7 years agotarget-arm: A64: Implement FCVTZS, FCVTZU in the shift-imm categories
Peter Maydell [Mon, 17 Mar 2014 16:31:51 +0000 (16:31 +0000)] 
target-arm: A64: Implement FCVTZS, FCVTZU in the shift-imm categories

Implement FCVTZS and FCVTZU in the shift-imm and scalar-shift-imm
categories; this completes the implementation of those two groups.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-19-git-send-email-peter.maydell@linaro.org

7 years agotarget-arm: A64: Handle saturating left shifts SQSHL, SQSHLU, UQSHL
Peter Maydell [Mon, 17 Mar 2014 16:31:51 +0000 (16:31 +0000)] 
target-arm: A64: Handle saturating left shifts SQSHL, SQSHLU, UQSHL

Implement the saturating left shift instructions SQSHL, SQSHLU
and UQSHL for the scalar-shift-imm and shift-imm categories.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-18-git-send-email-peter.maydell@linaro.org

7 years agoexec-all.h: Increase MAX_OP_PER_INSTR for ARM A64 decoder
Peter Maydell [Mon, 17 Mar 2014 16:31:51 +0000 (16:31 +0000)] 
exec-all.h: Increase MAX_OP_PER_INSTR for ARM A64 decoder

The ARM A64 decoder's worst case number of TCG ops per instruction
is 266 (for insn 0x4c800000, a post-indexed ST4 multiple-structures
store). Raise the MAX_OP_PER_INSTR define accordingly.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-17-git-send-email-peter.maydell@linaro.org

7 years agotarget-arm: A64: Implement FRINT*
Peter Maydell [Mon, 17 Mar 2014 16:31:50 +0000 (16:31 +0000)] 
target-arm: A64: Implement FRINT*

Implement the FRINT* round-to-integral operations from
the 2-reg-misc category.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-16-git-send-email-peter.maydell@linaro.org

7 years agotarget-arm: A64: Implement SRI
Peter Maydell [Mon, 17 Mar 2014 16:31:50 +0000 (16:31 +0000)] 
target-arm: A64: Implement SRI

Implement SRI (shift right and insert).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-15-git-send-email-peter.maydell@linaro.org

7 years agotarget-arm: A64: Add FRECPX (reciprocal exponent)
Alex Bennée [Mon, 17 Mar 2014 16:31:50 +0000 (16:31 +0000)] 
target-arm: A64: Add FRECPX (reciprocal exponent)

These are fairly simple exponent only estimation functions using helpers.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-14-git-send-email-peter.maydell@linaro.org

7 years agotarget-arm: A64: List unsupported shift-imm opcodes
Peter Maydell [Mon, 17 Mar 2014 16:31:50 +0000 (16:31 +0000)] 
target-arm: A64: List unsupported shift-imm opcodes

Add the remaining unsupported opcodes to the decode switches
for the shift-imm and scalar shift-imm categories so we can
see what is still to be implemented.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-13-git-send-email-peter.maydell@linaro.org

7 years agotarget-arm: A64: Implement FCVTL
Peter Maydell [Mon, 17 Mar 2014 16:31:49 +0000 (16:31 +0000)] 
target-arm: A64: Implement FCVTL

Implement FCVTL, the only instruction in the 2-reg-misc group
which widens from size to 2*size elements.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-12-git-send-email-peter.maydell@linaro.org

7 years agotarget-arm: A64: Implement FCVTN
Peter Maydell [Mon, 17 Mar 2014 16:31:49 +0000 (16:31 +0000)] 
target-arm: A64: Implement FCVTN

Implement FCVTN (narrowing fp-to-fp conversions) from the SIMD
2-reg-misc category.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-11-git-send-email-peter.maydell@linaro.org

7 years agotarget-arm: A64: Implement FCVT[NMAPZ][SU] SIMD instructions
Peter Maydell [Mon, 17 Mar 2014 16:31:49 +0000 (16:31 +0000)] 
target-arm: A64: Implement FCVT[NMAPZ][SU] SIMD instructions

Implement the floating-point-to-integer conversion instructions
FCVT[NMAPZ][SU] in the 2-reg-misc and scalar-2-reg-misc
categories.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-10-git-send-email-peter.maydell@linaro.org

7 years agotarget-arm: A64: Implement SHLL, SHLL2
Peter Maydell [Mon, 17 Mar 2014 16:31:49 +0000 (16:31 +0000)] 
target-arm: A64: Implement SHLL, SHLL2

Implement the SHLL and SHLL2 instructions from the 2-reg-misc
category.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-9-git-send-email-peter.maydell@linaro.org

7 years agotarget-arm: A64: Implement SADDLP, UADDLP, SADALP, UADALP
Peter Maydell [Mon, 17 Mar 2014 16:31:48 +0000 (16:31 +0000)] 
target-arm: A64: Implement SADDLP, UADDLP, SADALP, UADALP

Implement the SADDLP, UADDLP, SADALP and UADALP instructions
in the SIMD 2-reg misc category.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-8-git-send-email-peter.maydell@linaro.org

7 years agotarget-arm: A64: Saturating and narrowing shift ops
Alex Bennée [Mon, 17 Mar 2014 16:31:48 +0000 (16:31 +0000)] 
target-arm: A64: Saturating and narrowing shift ops

This implements the remaining [US][Q][R]SHR[U][N][2] opcodes, which are
saturating and narrowing shift right operations. These are used in
things like libav. Note signed shifts can have an "unsigned" saturating
narrow operation which will floor negative values.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1394822294-14837-7-git-send-email-peter.maydell@linaro.org
[PMM: Added the scalar encodings, style tweaks]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agotarget-arm: A64: Add remaining CLS/Z vector ops
Alex Bennée [Mon, 17 Mar 2014 16:31:48 +0000 (16:31 +0000)] 
target-arm: A64: Add remaining CLS/Z vector ops

Implement the CLS, CLZ operations in the 2-reg-misc category.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-6-git-send-email-peter.maydell@linaro.org

7 years agotarget-arm: A64: Add FSQRT to C3.6.17 (two misc)
Alex Bennée [Mon, 17 Mar 2014 16:31:47 +0000 (16:31 +0000)] 
target-arm: A64: Add FSQRT to C3.6.17 (two misc)

Implement FSQRT in the two-reg-misc category.
GCC uses this instruction form.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-5-git-send-email-peter.maydell@linaro.org

7 years agotarget-arm: A64: Add last AdvSIMD Integer to FP ops
Alex Bennée [Mon, 17 Mar 2014 16:31:47 +0000 (16:31 +0000)] 
target-arm: A64: Add last AdvSIMD Integer to FP ops

This adds the remaining [US]CVTF operations to the SIMD
shift-immediate, scalar-shift-immediate, two-reg-misc and
scalar-two-reg-misc groups of opcodes.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1394822294-14837-4-git-send-email-peter.maydell@linaro.org
[PMM: added scalar 2-misc and scalar-shift-imm encodings]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agotarget-arm: A64: Fix bug in add_sub_ext handling of rn
Alex Bennée [Mon, 17 Mar 2014 16:31:47 +0000 (16:31 +0000)] 
target-arm: A64: Fix bug in add_sub_ext handling of rn

rn == 31 always means SP (not XZR) whether an add_sub_ext
instruction is setting the flags or not; only rd has behaviour
dependent on whether we are setting flags.

Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-3-git-send-email-peter.maydell@linaro.org

7 years agotarget-arm: A64: Implement PMULL instruction
Peter Maydell [Mon, 17 Mar 2014 16:31:47 +0000 (16:31 +0000)] 
target-arm: A64: Implement PMULL instruction

Implement the PMULL instruction; this is the last unimplemented insn
in the three-reg-diff group.

Note that PMULL with size 3 is considered part of the AES part
of the crypto extensions (see the ID_AA64ISAR0_EL1 register definition
in the v8 ARM ARM), so it isn't necessary to burn an extra feature
bit on it, even though we're using more feature bits than a single
"crypto extension present/not present" toggle.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-2-git-send-email-peter.maydell@linaro.org

7 years agotarget-arm: Add ARM_CP_IO notation to PMCR reginfo
Peter Maydell [Mon, 17 Mar 2014 16:31:46 +0000 (16:31 +0000)] 
target-arm: Add ARM_CP_IO notation to PMCR reginfo

Now that the PMCR writefn makes timer accesses, its reginfo needs
the ARM_CP_IO flag, so that icount mode works correctly. (Fixes
the bug accidentally introduced in commit 7c2cb42b).

Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1394908291-16546-1-git-send-email-peter.maydell@linaro.org

7 years agovirt: Set reset-cbar on CPUs
Peter Maydell [Mon, 17 Mar 2014 16:31:46 +0000 (16:31 +0000)] 
virt: Set reset-cbar on CPUs

Set the reset-cbar property on CPUs used by the virt board,
if they have it. This isn't necessary for correct functioning
under Linux (since the A9 isn't a valid CPU for the virt board),
but it is the correct behaviour.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1394462692-8871-5-git-send-email-peter.maydell@linaro.org

7 years agoexynos4210: Set reset-cbar property of Cortex-A9 CPUs
Peter Maydell [Mon, 17 Mar 2014 16:31:46 +0000 (16:31 +0000)] 
exynos4210: Set reset-cbar property of Cortex-A9 CPUs

Set the reset-cbar property of the Exynos4210 SoC's Cortex-A9
CPUs, so that Linux doesn't misrecognize them as a broken
uniprocessor SoC.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1394462692-8871-4-git-send-email-peter.maydell@linaro.org

7 years agorealview-pbx-a9: Set reset-cbar property for CPUs
Peter Maydell [Mon, 17 Mar 2014 16:31:45 +0000 (16:31 +0000)] 
realview-pbx-a9: Set reset-cbar property for CPUs

If the CPU is a Cortex-A9 then we should set its reset-cbar property
so that the guest can read the correct PERIPHBASE/CBAR register value;
newer versions of the Linux kernel (as of commit bc41b8724 in 3.12)
will otherwise assume the CPU is a buggy single core A9 SoC. The
realview-pbx-a9 is the only one of the cluster of boards in realview.c
which works with the Cortex-A9 (ie which gets an a9mpcore_priv device);
make sure it also has reset-cbar set correctly.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1394462692-8871-3-git-send-email-peter.maydell@linaro.org

7 years agovexpress: Set reset-cbar property for CPUs
Peter Maydell [Mon, 17 Mar 2014 16:31:45 +0000 (16:31 +0000)] 
vexpress: Set reset-cbar property for CPUs

Newer versions of the Linux kernel (as of commit bc41b8724 in 3.12)
now assume that if the CPU is a Cortex-A9 and the reset value of the
PERIPHBASE/CBAR register is zero then the CPU is a specific buggy
single core A9 SoC, and will not try to start other cores. Since we
now have a CPU property for the reset value of the CBAR, we can
just fix the vexpress board model to correctly set CBAR so SMP
works again. To avoid duplicate boilerplate code in both the A9
and A15 daughterboard init functions, we split out the CPU and
private memory region init to its own function.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reported-by: Rob Herring <rob.herring@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1394462692-8871-2-git-send-email-peter.maydell@linaro.org

7 years agoMerge remote-tracking branch 'remotes/kraxel/tags/pull-gtk-3' into staging
Peter Maydell [Mon, 17 Mar 2014 15:51:57 +0000 (15:51 +0000)] 
Merge remote-tracking branch 'remotes/kraxel/tags/pull-gtk-3' into staging

gtk: warp bugfixes.
gtk: Allow to activate grab-on-hover from the command line

# gpg: Signature made Mon 17 Mar 2014 13:35:35 GMT using RSA key ID D3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>"

* remotes/kraxel/tags/pull-gtk-3:
  gtk: Don't warp absolute pointer
  gtk: Fix mouse warping with gtk3
  gtk: Allow to activate grab-on-hover from the command line

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agogtk: Don't warp absolute pointer
Cole Robinson [Thu, 13 Mar 2014 19:30:24 +0000 (15:30 -0400)] 
gtk: Don't warp absolute pointer

This matches the behavior of SDL, and makes the mouse usable when
using -display gtk -vga qxl

https://bugzilla.redhat.com/show_bug.cgi?id=1051724
Signed-off-by: Cole Robinson <crobinso@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
7 years agogtk: Fix mouse warping with gtk3
Cole Robinson [Thu, 13 Mar 2014 19:30:23 +0000 (15:30 -0400)] 
gtk: Fix mouse warping with gtk3

We were using the wrong coordinates, this fixes things to match the
original gtk2 implementation.

You can see this error in action by using -vga qxl, however even after this
patch the mouse warps in small increments up and to the left, -7x and -3y
pixels at a time, until the pointer is warped off the widget. I think it's
a qxl bug, but the next patch covers it up.

Signed-off-by: Cole Robinson <crobinso@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
7 years agogtk: Allow to activate grab-on-hover from the command line
Jan Kiszka [Wed, 12 Mar 2014 07:33:50 +0000 (08:33 +0100)] 
gtk: Allow to activate grab-on-hover from the command line

As long as we have no persistent GTK configuration, this allows to
enable the useful grab-on-hover feature already when starting the VM.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
[ kraxel: fix warning with CONFIG_GTK=n ]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
7 years agolinux-user: Implement capget, capset
Peter Maydell [Mon, 17 Mar 2014 12:15:35 +0000 (12:15 +0000)] 
linux-user: Implement capget, capset

Implement the capget and capset syscalls. This is useful because
simple programs like 'ls' try to use it in AArch64, and otherwise
we emit a lot of noise about it being unimplemented.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
7 years agoMerge remote-tracking branch 'remotes/bonzini/fixes-for-2.0' into staging
Peter Maydell [Mon, 17 Mar 2014 13:05:48 +0000 (13:05 +0000)] 
Merge remote-tracking branch 'remotes/bonzini/fixes-for-2.0' into staging

* remotes/bonzini/fixes-for-2.0:
  vl.c: Output error on invalid machine type
  target-alpha: fix subl and s8subl indentation
  qemu-nbd: Fix coverity issues
  rules.mak: Fix per object libs extraction

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agovl.c: Output error on invalid machine type
Miroslav Rezanina [Fri, 14 Mar 2014 12:06:54 +0000 (13:06 +0100)] 
vl.c: Output error on invalid machine type

Output error message using qemu's error_report() function when user
provides the invalid machine type on the command line. This also saves
time to find what issue is when you downgrade from one version of qemu
to another that doesn't support required machine type yet (the version
user downgraded to have to have this patch applied too, of course).

Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
[Replace printf with error_printf, suggested by Markus Armbruster. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
7 years agotarget-alpha: fix subl and s8subl indentation
Paolo Bonzini [Sat, 15 Mar 2014 18:33:15 +0000 (19:33 +0100)] 
target-alpha: fix subl and s8subl indentation

Two missing braces, one close and one open, fabulously let the code
compile.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
7 years agoqemu-nbd: Fix coverity issues
Paolo Bonzini [Fri, 14 Mar 2014 17:10:54 +0000 (18:10 +0100)] 
qemu-nbd: Fix coverity issues

There are two issues in qemu-nbd: a missing return value check after
calling accept(), and file descriptor leaks in nbd_client_thread.

Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
7 years agorules.mak: Fix per object libs extraction
Fam Zheng [Fri, 14 Mar 2014 02:21:05 +0000 (10:21 +0800)] 
rules.mak: Fix per object libs extraction

Don't sort the extracted options, sort the objects.

Reported-by: Christian Mahnke <cmahnke@googlemail.com>
Signed-off-by: Fam Zheng <famz@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
7 years agoMakefile: Fix "make clean"
Fam Zheng [Mon, 17 Mar 2014 01:35:22 +0000 (09:35 +0800)] 
Makefile: Fix "make clean"

This fixes a dangerous bug: "make clean" after "make distclean" will
delete every single file including those under .git, if you do in-tree
build!

Rationale: A first "make distclean" will unset $(DSOSUF), a following
"make distclean" or "make clean" will find all the files and delete it.

Fix it by explicitly typing the file extensions here, and combine
multiple find invocations into one.

Signed-off-by: Fam Zheng <famz@redhat.com>
Message-id: 1395020122-4957-1-git-send-email-famz@redhat.com
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agolinux-user: Don't allow guest to block SIGSEGV
Peter Maydell [Fri, 14 Mar 2014 14:36:56 +0000 (14:36 +0000)] 
linux-user: Don't allow guest to block SIGSEGV

Don't allow the linux-user guest to block SIGSEGV -- QEMU needs this
signal to detect accesses to pages which it has marked read-only
because it has cached translated code from them.

We implement this by making the do_sigprocmask() wrapper suppress
SIGSEGV when doing the host process signal mask manipulation; instead
we store the current state of SIGSEGV in the TaskState struct.

If we get a SIGSEGV for the guest when the guest has blocked the
signal, we treat it as if the default SEGV handler was in place,
as the kernel does for forced SIGSEGV delivery.

This patch is based on an idea by Alex Barcelo, but rather than
simply lying to the guest about the SIGSEGV state we track it.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reported-by: Alex Barcelo <abarcelo@ac.upc.edu>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
7 years agosignal: added a wrapper for sigprocmask function
Alex Barcelo [Fri, 14 Mar 2014 14:36:55 +0000 (14:36 +0000)] 
signal: added a wrapper for sigprocmask function

Create a wrapper for signal mask changes initiated by the guest;
(this includes syscalls and also the sigreturns from signal.c)
this will give us a place to put code which prevents the guest
from changing the handling of signals used by QEMU itself
internally.

The wrapper is called from all the guest-initiated sigprocmask, but
is not called from internal qemu sigprocmask calls.

Signed-off-by: Alex Barcelo <abarcelo@ac.upc.edu>
[PMM: Added calls to wrapper for sigprocmask uses in signal.c
when setting the signal mask on entry and exit from signal
handlers, since these also are guest-provided signal masks.]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
7 years agolinux-user: Don't reserve space for commpage for AArch64
Peter Maydell [Mon, 10 Mar 2014 12:59:17 +0000 (12:59 +0000)] 
linux-user: Don't reserve space for commpage for AArch64

AArch64 Linux, unlike AArch32, doesn't use a commpage. This means we
should not be reserving room in the guest address space for one.
Fixes LP:1287195.

Reported-by: Amanieu d'Antras <amanieu@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
7 years agolinux-user: implement F_[GS]ETOWN_EX
Andreas Schwab [Fri, 7 Mar 2014 14:24:08 +0000 (15:24 +0100)] 
linux-user: implement F_[GS]ETOWN_EX

F_GETOWN is replaced by F_GETOWN_EX inside the glibc fcntl wrapper

Signed-off-by: Andreas Schwab <schwab@suse.de>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
7 years agolinux-user: Don't return uninitialized value for atomic_barrier syscall
Peter Maydell [Wed, 12 Mar 2014 13:06:01 +0000 (13:06 +0000)] 
linux-user: Don't return uninitialized value for atomic_barrier syscall

QEMU's implementation of the m68k atomic_barrier syscall, like the kernel's,
is just a no-op. However we still need to return a result code from it.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
7 years agolinux-user/signal.c: Correct error path for AArch64 do_rt_sigreturn
Peter Maydell [Wed, 12 Mar 2014 13:06:00 +0000 (13:06 +0000)] 
linux-user/signal.c: Correct error path for AArch64 do_rt_sigreturn

The error path in AArch64 do_rt_sigreturn() which fails before
attempting lock_user_struct() was doing an unlock_user_struct()
on an uninitialized variable. Initialize frame to NULL so we
can use the same error-exit path in all cases (unlock of NULL
is permitted and does nothing).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
7 years agoMerge remote-tracking branch 'remotes/mjt/tags/trivial-patches-2014-03-15' into staging
Peter Maydell [Sat, 15 Mar 2014 18:22:10 +0000 (18:22 +0000)] 
Merge remote-tracking branch 'remotes/mjt/tags/trivial-patches-2014-03-15' into staging

trivial patches for 2014-03-15

# gpg: Signature made Sat 15 Mar 2014 09:54:30 GMT using RSA key ID 74F0C838
# gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>"
# gpg:                 aka "Michael Tokarev <mjt@corpit.ru>"
# gpg:                 aka "Michael Tokarev <mjt@debian.org>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D  4324 457C E0A0 8044 65C5
#      Subkey fingerprint: E190 8639 3B10 B51B AC2C  8B73 5253 C5AD 74F0 C838

* remotes/mjt/tags/trivial-patches-2014-03-15:
  FSL eTSEC: Fix typo in rx ring
  scripts/make-release: Don't distribute .git directories
  configure: Don't use __int128_t for clang versions before 3.2
  audio: Add 'static' attributes to several variables
  tests: Fix 'make test' for i686 hosts (build regression)
  misc: Fix typos in comments
  Add qga/qapi-generated to .gitignore
  hw/timer/grlib_gptimer: Avoid integer overflows
  .travis.yml: add IRC notifications for build failures
  .travis.yml: trivial whitespace fixup
  .travis.yml: re-enable lttng user space trace test
  .travis.yml: add a new build target with non-core devlibs
  sasl: Avoid 'Could not find keytab file' in syslog

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agoMerge remote-tracking branch 'remotes/rth/tcg-aarch-6-2' into staging
Peter Maydell [Sat, 15 Mar 2014 18:03:15 +0000 (18:03 +0000)] 
Merge remote-tracking branch 'remotes/rth/tcg-aarch-6-2' into staging

* remotes/rth/tcg-aarch-6-2:
  tcg-aarch64: Introduce tcg_out_insn_3405
  tcg-aarch64: Support div, rem
  tcg-aarch64: Support muluh, mulsh
  tcg-aarch64: Support add2, sub2
  tcg-aarch64: Support deposit
  tcg-aarch64: Use tcg_out_insn for setcond
  tcg-aarch64: Support movcond
  tcg-aarch64: Support andc, orc, eqv, not, neg
  tcg-aarch64: Handle constant operands to and, or, xor
  tcg-aarch64: Handle constant operands to add, sub, and compare
  tcg-aarch64: Implement mov with tcg_out_insn
  tcg-aarch64: Introduce tcg_out_insn_3401
  tcg-aarch64: Convert shift insns to tcg_out_insn
  tcg-aarch64: Introduce tcg_out_insn

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
7 years agoFSL eTSEC: Fix typo in rx ring
Fabien Chouteau [Fri, 14 Mar 2014 16:51:41 +0000 (17:51 +0100)] 
FSL eTSEC: Fix typo in rx ring

Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
7 years agoscripts/make-release: Don't distribute .git directories
Cole Robinson [Fri, 14 Mar 2014 16:49:13 +0000 (12:49 -0400)] 
scripts/make-release: Don't distribute .git directories

[crobinso@localhost qemu-2.0.0-rc0]$ find . -name .git
./dtc/.git
./pixman/.git

This is already done for the rom submodules.

https://bugs.launchpad.net/qemu/+bug/1224414
Signed-off-by: Cole Robinson <crobinso@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
7 years agoconfigure: Don't use __int128_t for clang versions before 3.2
Stefan Weil [Fri, 7 Mar 2014 09:43:38 +0000 (10:43 +0100)] 
configure: Don't use __int128_t for clang versions before 3.2

Those versions don't fully support __int128_t.

Cc: qemu-stable@nongnu.org
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
7 years agoaudio: Add 'static' attributes to several variables
Stefan Weil [Wed, 5 Mar 2014 21:21:32 +0000 (22:21 +0100)] 
audio: Add 'static' attributes to several variables

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
7 years agotests: Fix 'make test' for i686 hosts (build regression)
Stefan Weil [Fri, 7 Mar 2014 10:11:22 +0000 (11:11 +0100)] 
tests: Fix 'make test' for i686 hosts (build regression)

'make test' is broken at least since commit
baacf04799ace72a9c735dd9306a1ceaf305e7cf. Several source files were moved
to util/, and some of them there split, so add the missing prefix and new
files to fix the compiler and linker errors.

There remain more issues, but these changes allow running the test on a
Linux i686 host.

Cc: qemu-stable@nongnu.org
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
7 years agomisc: Fix typos in comments
Stefan Weil [Fri, 7 Mar 2014 18:48:59 +0000 (19:48 +0100)] 
misc: Fix typos in comments

Codespell found and fixed these new typos:

* doesnt -> doesn't
* funtion -> function
* perfomance -> performance
* remaing -> remaining

A coding style issue (line too long) was fixed manually.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
7 years agoAdd qga/qapi-generated to .gitignore
Gabriel L. Somlo [Mon, 10 Mar 2014 18:08:59 +0000 (14:08 -0400)] 
Add qga/qapi-generated to .gitignore

The folder "qga/qapi-generated" shows up after building QEMU, and
gets in the way during e.g. "git add ."; Add it to .gitignore to
keep it from accidentally ending up in the wrong place.

Signed-off-by: Gabriel Somlo <somlo@cmu.edu>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
7 years agohw/timer/grlib_gptimer: Avoid integer overflows
Sebastian Huber [Sun, 16 Feb 2014 11:12:38 +0000 (12:12 +0100)] 
hw/timer/grlib_gptimer: Avoid integer overflows

The GPTIMER uses 32-bit registers.  Use a 64-bit operation to get the
ptimer count, otherwise we end up with a count of 0 for GPTIMER counter
values of 0xffffffff.

Use the GPTIMER counter value for tracing to avoid an overflow of the
32-bit value passed to trace_grlib_gptimer_enable().

Reviewed-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>