u-boot.git
24 hours agoPrepare v2023.04-rc1 master v2023.04-rc1
Tom Rini [Mon, 30 Jan 2023 20:36:45 +0000 (15:36 -0500)] 
Prepare v2023.04-rc1

Signed-off-by: Tom Rini <trini@konsulko.com>
24 hours agoRevert "rockchip: Only call binman when TPL available"
Jagan Teki [Fri, 27 Jan 2023 07:21:33 +0000 (12:51 +0530)] 
Revert "rockchip: Only call binman when TPL available"

This reverts commit f5315dd6290a588434e4f79bfd2886bb7df9210d.

[why]
TPL is not mandatory for not all Rockchip SoCs, some SoCs like
RK356x, and RK3588 still use mainline u-boot without TPL as
their ddr init programs are accessed via binaries provided by
Rockchip instead of ddr source code.

Marking TPL build makes it not able to build u-boot.itb on
RK356x targets so revert this so that it can build an SPL build
that would support all across Rockchip platforms.

Suggested-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Tested-by: Anand Moon <linux.amoon@gmail.com> # CM3
4 days agoMerge branch '2023-01-27-apple-soc-updates'
Tom Rini [Fri, 27 Jan 2023 19:48:22 +0000 (14:48 -0500)] 
Merge branch '2023-01-27-apple-soc-updates'

First, to quote the author:
This series adds support for the PCIe controller found on Apple M1 and
M2 machines and enables support for PCIe XHCI controllers.  This makes
the type-A USB ports on the M1 Mac mini work.  Since the use of Apples
DART IOMMU is mandatory (these PCIe DARTs don't support bypass mode),
this adds DMA mapping operations to the IOMMU uclass and implements
them for the Apple DART.  It modifies the XHCI driver code to go map
DMA buffers through the IOMMU if there is one.  Since the M1 Mac mini
now has two types of XHCI controllers with different number of ports
(2 for the DWC3 controllers, 8 for the Fresco Logic PCIe controller)
this uncovered an issue in with the way the hub descriptor is
implemented in the XHCI driver.

Second, Mark also fixes some Apple-specific instances of
CONFIG_IS_ENABLED that should be IS_ENABLED.

4 days agoMerge tag 'efi-2023-04-rc1-3' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Fri, 27 Jan 2023 19:48:14 +0000 (14:48 -0500)] 
Merge tag 'efi-2023-04-rc1-3' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request efi-2023-04-rc1-3

Documentation:

* Improve the sl-mx8mm documenation
* Clean up README, move some section to HTML
* Man-pages for the mtime and sleep command
* Description of reducible builds
* Document dynamic event handlers

UEFI:

* Support scrolling in eficonfig command

Other:

* fix mtest on 64 bit systems

4 days agousb: xhci: Fix root hub descriptor
Mark Kettenis [Sat, 21 Jan 2023 19:28:00 +0000 (20:28 +0100)] 
usb: xhci: Fix root hub descriptor

When a system has multiple XHCI controllers, some of the
properties described in the descriptor of the root hub (such as
the number of ports) might differ between controllers.  Fix this
by switching from a single global hub descriptor to a hub
descriptor per controller.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Marek Vasut <marex@denx.de>
4 days agoarm: apple: Enable PCIe USB controller
Mark Kettenis [Sat, 21 Jan 2023 19:27:59 +0000 (20:27 +0100)] 
arm: apple: Enable PCIe USB controller

Some Apple Silicon machines have a PCIe XHCI controller in additon
to the DWC3 controllers integrated on the SoC.  On the Mac mini
the Type-A ports are handled by this PCIe controller.  Enabling
it allows the use of these ports in U-Boot.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
4 days agopci: Add Apple PCIe controller driver
Mark Kettenis [Sat, 21 Jan 2023 19:27:58 +0000 (20:27 +0100)] 
pci: Add Apple PCIe controller driver

This driver supports the PCIe controller on the Apple M1 and
M2 SoCs.  The code is adapted from the Linux driver.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
4 days agotest: Add test for mapping IOMMUs for PCI devices
Mark Kettenis [Sat, 21 Jan 2023 19:27:57 +0000 (20:27 +0100)] 
test: Add test for mapping IOMMUs for PCI devices

Test that we correctly probe an IOMMU that is mapped by an
"iommu-map" device tree property of a PCIe controller node.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 days agoiommu: Implement mapping IOMMUs for PCI devices
Mark Kettenis [Sat, 21 Jan 2023 19:27:56 +0000 (20:27 +0100)] 
iommu: Implement mapping IOMMUs for PCI devices

Systems such as Apple's M1 and M2 SoCs may have separate IOMMUs
for each PCIe root port.  In this case the right IOMMU for a
PCI device behind a particular root port is described by an
"iommu-map" property in the device tree.  Parse this property
and use it to find the right IOMMU device for PCI devices.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
4 days agousb: xhci: Implement DMA mapping
Mark Kettenis [Sat, 21 Jan 2023 19:27:55 +0000 (20:27 +0100)] 
usb: xhci: Implement DMA mapping

An XHCI controller that sits behind an IOMMU needs to map and unmap
its memory buffers to do DMA.  Implement this by inroducing new
xhci_dma_map() and xhci_dma_unmap() helper functions.  The
xhci_dma_map() function replaces the existing xhci_virt_to_bus()
function in the sense that it returns the bus address in the case
of simple address translation in the absence of an IOMMU.  The
xhci_bus_to_virt() function is eliminated by storing the CPU
address of the allocated scratchpad memory in struct xhci_ctrl.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Marek Vasut <marex@denx.de>
4 days agoiommu: apple: Implement DMA mapping operations for Apple DART
Mark Kettenis [Sat, 21 Jan 2023 19:27:54 +0000 (20:27 +0100)] 
iommu: apple: Implement DMA mapping operations for Apple DART

Implement translation table support for all the variations of
Apple's DART IOMMU that can be found on Apple's M1 and M2 SoCs.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
4 days agotest: Add test for IOMMU uclass map/unmap ops
Mark Kettenis [Sat, 21 Jan 2023 19:27:53 +0000 (20:27 +0100)] 
test: Add test for IOMMU uclass map/unmap ops

Test that the map and unmap operations work for devices that
have DMA translated by an IOMMU and devices that don't have
DMA translated by an IOMMU.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 days agoiommu: Add DMA mapping operations
Mark Kettenis [Sat, 21 Jan 2023 19:27:52 +0000 (20:27 +0100)] 
iommu: Add DMA mapping operations

In order to support IOMMUs in non-bypass mode we need device ops
to map and unmap DMA memory.  The map operation enters a mapping
for a region specified by CPU address and size into the translation
table of the IOMMU and returns a DMA address suitable for
programming the device to do DMA.  The unmap operation removes
this mapping from the translation table of the IOMMU.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
4 days agoserial: s5p: Use IS_ENABLED where appropriate
Mark Kettenis [Thu, 26 Jan 2023 13:44:09 +0000 (14:44 +0100)] 
serial: s5p: Use IS_ENABLED where appropriate

There are no SPL/TPL variants of CONFIG_CLK_EXYNOS and
CONFIG_ARCH_APPLE, so switch from CONFIG_IS_ENABLED to
IS_ENABLED.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 days agoMerge branch '2023-01-27-assorted-updates'
Tom Rini [Fri, 27 Jan 2023 19:04:51 +0000 (14:04 -0500)] 
Merge branch '2023-01-27-assorted-updates'

- TI j721s2 support, Nuvoton npcm8xx updates, bouncebuf fix, mkimage fix
  so you can adjust the magic image, pinctrl fixes, ifwitool bugfix

4 days agomkimage: fit: Support signed configurations in 'auto' FITs
Massimo Pegorer [Thu, 5 Jan 2023 09:31:09 +0000 (10:31 +0100)] 
mkimage: fit: Support signed configurations in 'auto' FITs

Extend support for signing in auto-generated (-f auto) FIT. Previously,
it was possible to get signed 'images' subnodes in the FIT using
options -g and -o together with -f auto. This patch allows signing
'configurations' subnodes instead of 'images' ones (which are hashed),
using option -f auto-conf instead of -f auto. Adding also -K <dtb> and
-r options, will add public key to <dtb> file with required = "conf"
property.

Summary:
    -f auto => FIT with crc32 images
    -f auto -g ... -o ... => FIT with signed images
    -f auto-conf -g ... -o ... => FIT with sha1 images and signed confs

Example: FIT with kernel, two device tree files, and signed
configurations; public key (needed to verify signatures) is
added to u-boot.dtb with required = "conf" property.

mkimage -f auto-conf -A arm -O linux -T kernel -C none -a 43e00000 \
        -e 0 -d vmlinuz -b /path/to/first.dtb -b /path/to/second.dtb \
        -k /folder/with/key-files -g keyname -o sha256,rsa4096 \
        -K u-boot.dtb -r kernel.itb

Example: Add public key with required = "conf" property to u-boot.dtb
without needing to sign anything. This will also create a useless FIT
named unused.itb.

mkimage -f auto-conf -d /dev/null -k /folder/with/key-files \
        -g keyname -o sha256,rsa4096 -K u-boot.dtb -r unused.itb

Signed-off-by: Massimo Pegorer <massimo.pegorer@vimar.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 days agocommon: bouncebuf: Use dma-mapping for cache ops
Andrew Davis [Fri, 6 Jan 2023 18:02:50 +0000 (12:02 -0600)] 
common: bouncebuf: Use dma-mapping for cache ops

This matches how this would be done in Linux and these functions
do the alignment for us which makes the code look cleaner.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 days agoinclude: configs: Update env for selecting right dtb
Sinthu Raja [Tue, 10 Jan 2023 15:47:58 +0000 (21:17 +0530)] 
include: configs: Update env for selecting right dtb

Now that single defconfig shall be used for booting J721S2 EVM and
AM68 SK, the default device tree will not work for selecting dtb for
kernel. Update the findfdt env to select right dtb based on
board_name env variable.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
4 days agoarm: dts: k3-am68-sk: Add r5 specific dt support
Sinthu Raja [Tue, 10 Jan 2023 15:47:57 +0000 (21:17 +0530)] 
arm: dts: k3-am68-sk: Add r5 specific dt support

Add initial support for AM68 SK device tree that runs on R5.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
4 days agoarm: dts: Add support for A72 specific AM68 Starter Kit Base Board
Sinthu Raja [Tue, 10 Jan 2023 15:47:56 +0000 (21:17 +0530)] 
arm: dts: Add support for A72 specific AM68 Starter Kit Base Board

The SK architecture comprises of baseboard and a SOM board. The
AM68 Starter Kit's baseboard contains most of the actual connectors,
power supply etc. The System on Module (SoM) is plugged on to the base
board. Therefore, add support for peripherals brought out in the base
board.

Schematics: https://www.ti.com/lit/zip/SPRR463

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
4 days agoarm: dts: Add initial support for AM68 Starter Kit System on Module
Sinthu Raja [Tue, 10 Jan 2023 15:47:55 +0000 (21:17 +0530)] 
arm: dts: Add initial support for AM68 Starter Kit System on Module

AM68 Starter Kit (SK) is a low cost, small form factor board designed
for TI’s AM68 SoC. TI’s AM68 SoC comprises of dual core A72, high
performance vision accelerators, hardware accelerators, latest C71x
DSP, high bandwidth real-time IPs for capture and display. The SoC is
power optimized to provide best in class performance for industrial
applications.

        AM68 SK supports the following interfaces:
        * 16 GB LPDDR4 RAM
        * x1 Gigabit Ethernet interface
        * x1 USB 3.1 Type-C port
        * x2 USB 3.1 Type-A ports
        * x1 PCIe M.2 M Key
        * 512 Mbit OSPI flash
        * x2 CSI2 Camera interface (RPi and TI Camera connector)
        * 40-pin Raspberry Pi GPIO header

SK's System on Module (SoM) contains the SoC, PMIC, DDR and OSPI flash.
Therefore, add support for the components present on the SoM.

Schematics: https://www.ti.com/lit/zip/SPRR463
TRM: http://www.ti.com/lit/pdf/spruj28

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
4 days agoboard: ti: j721s2: Add board_init and support for selecting DT based on EEPROM
Sinthu Raja [Tue, 10 Jan 2023 15:47:54 +0000 (21:17 +0530)] 
board: ti: j721s2: Add board_init and support for selecting DT based on EEPROM

Add the board_init_f API for SPL and run the platform-required SoC
initialization.

Add the functionality for board name-based DTB selection from FIT
within SPL. This will make it easier to utilise one defconfig for
both the EVM and the SK.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
4 days agoarch: mach-k3: Update board specific API name to K3 generic API name
Sinthu Raja [Tue, 10 Jan 2023 15:47:53 +0000 (21:17 +0530)] 
arch: mach-k3: Update board specific API name to K3 generic API name

Although the board_init_f API initialises the SoC, the API name is
incorrectly specified and misleads the functionality. This file should
only include k3-specific functionality. Change the API's name to something
more K3-specific and separate the function to make it more modular.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
4 days agoboard: ti: j721s2: Add support for detecting multiple device trees
Sinthu Raja [Tue, 10 Jan 2023 15:47:52 +0000 (21:17 +0530)] 
board: ti: j721s2: Add support for detecting multiple device trees

Update the board_fit_config_name_match() to choose the right dtb
based on the board name read from EEPROM.

Also restrict multpile EEPROM reads by verifying if EEPROM is already
read

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
4 days agoboard: ti: j721s2: Enable support for reading EEPROM at next alternate address
Sinthu Raja [Tue, 10 Jan 2023 15:47:51 +0000 (21:17 +0530)] 
board: ti: j721s2: Enable support for reading EEPROM at next alternate address

J721S2 EVM has EEPROM populated at 0x50. AM68 SK has EEPROM populated at
next address 0x51 in order to be compatible with RPi. So start looking
for TI specific EEPROM at 0x50, if not found look for EEPROM at 0x51.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
4 days agoboard: ti: j721s2: Add support to update board_name for am68-sk
Sinthu Raja [Tue, 10 Jan 2023 15:47:50 +0000 (21:17 +0530)] 
board: ti: j721s2: Add support to update board_name for am68-sk

Update setup_board_eeprom_env() to choose the right board name
for am68-sk.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
4 days agoconfigs: j721s2_evm: Enable configs to store env in MMC FAT partition
Sinthu Raja [Tue, 10 Jan 2023 15:47:49 +0000 (21:17 +0530)] 
configs: j721s2_evm: Enable configs to store env in MMC FAT partition

J721S2 EVM used to store env on eMMC, since EVM and SK uses same
defconfig and there is no eMMC on SK, we need to keep env in an
interface which available on both EVM and SK. So, save env in FAT
partition of MMC SD Card.

Enable defconfigs relevant for storing env on FAT partition of MMC.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
4 days agoconfigs: j721s2_evm_a72: Enable support for building multiple dtbs into FIT
Sinthu Raja [Tue, 10 Jan 2023 15:47:48 +0000 (21:17 +0530)] 
configs: j721s2_evm_a72: Enable support for building multiple dtbs into FIT

Enable configs for building multiple dtbs into a single fit image
and load the right dtb for next stage. Add k3-am68-sk-base-board
dtb along with evm dtb inside DTB FIT image. This helps to use same
defconfig for both EVM and SK

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
4 days agoconfigs: j721s2_evm_r5: Enable support for building multiple dtbs into FIT
Sinthu Raja [Tue, 10 Jan 2023 15:47:47 +0000 (21:17 +0530)] 
configs: j721s2_evm_r5: Enable support for building multiple dtbs into FIT

Enable configs for building multiple dtbs into a single fit image
and load the right dtb for next stage. This will help to use same
defconfig for both EVM and SK.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
4 days agoMAINTAINERS: add include/power/ to POWER
John Keeping [Thu, 19 Jan 2023 12:55:19 +0000 (12:55 +0000)] 
MAINTAINERS: add include/power/ to POWER

Add the related include files to the power MAINTAINERS entry.

Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 days agoifwitool: Fix member access
Simon Glass [Wed, 18 Jan 2023 20:13:17 +0000 (13:13 -0700)] 
ifwitool: Fix member access

On a second and third look, a recent patch seems to be writing to the
wrong place - updating offsets from the address of the pointer instead
of what the pointer points to.

Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 2d1b2ac13fe ("tool: ifwitool: Fix buffer overflow")
Acked-by: Sean Anderson <seanga2@gmail.com>
4 days agopinctrl: fix docstring
Michael Walle [Wed, 18 Jan 2023 12:12:24 +0000 (13:12 +0100)] 
pinctrl: fix docstring

Fix the copy and paste error.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 days agopinctrl: get rid of some ifdeffery
Michael Walle [Wed, 18 Jan 2023 12:12:23 +0000 (13:12 +0100)] 
pinctrl: get rid of some ifdeffery

Don't define an empty version for pinconfig_post_bind(). Just guard the
call and let the linker garbage collection do the rest. This way, we
also don't have to do any guesswork.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Marek Vasut <marex@denx.de>
4 days agopinctrl: don't fall back to pinctrl_select_state_simple()
Michael Walle [Wed, 18 Jan 2023 12:12:22 +0000 (13:12 +0100)] 
pinctrl: don't fall back to pinctrl_select_state_simple()

If CONFIG_PINCTRL_FULL is enabled, never fall back to the simple
implementation. pinctrl_select_state() is called for each device and it
is expected to fail. A fallback to the simple imeplementation doesn't
make much sense.

To keep the return code consistent, we need to change the -EINVAL (which
was ignored before) to -ENOSYS.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 days agoarm: npcm8xx: add security feature header
Jim Liu [Tue, 17 Jan 2023 08:59:23 +0000 (16:59 +0800)] 
arm: npcm8xx: add security feature header

The NPCM driver can use on npcm7xx/npcm8xx
so add npcm8xx header for driver.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
4 days agoARM: config: enable function for nuvoton npcm845 bmc
Jim Liu [Tue, 17 Jan 2023 08:59:22 +0000 (16:59 +0800)] 
ARM: config: enable function for nuvoton npcm845 bmc

Enable npcm845 i2c、ethernet、REGULATOR and security feature

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
4 days agoARM: dts: npcm8xx: add npcm845 function node
Jim Liu [Tue, 17 Jan 2023 08:59:21 +0000 (16:59 +0800)] 
ARM: dts: npcm8xx: add npcm845 function node

Add functaion node list as below:
1. i2c
2. gmac
3. otp
4. aes
5. sha
6. rng
7. serial

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
4 days agoefi_loader: don't use HandleProtocol
Heinrich Schuchardt [Tue, 24 Jan 2023 19:36:45 +0000 (20:36 +0100)] 
efi_loader: don't use HandleProtocol

HandleProtocol() is deprecrated. According to the UEFI specification it
should be implemented as a call to  OpenProtocolInterface() with a hard
coded agent handle. This implies that we would have to call
CloseProtocolInterfaces() after usage with the same handle.

Getting rid of an EFI_CALL() is also appreciated.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 days agoeficonfig: increase the number of menu entries
Masahisa Kojima [Tue, 24 Jan 2023 06:56:16 +0000 (15:56 +0900)] 
eficonfig: increase the number of menu entries

Current eficonfig has the maximum number of menu entries and
it is 99. If there are more EFI load options and files in the
system, eficonfig can not handle it.

This commit increases this maximum number of menu entries
to INT_MAX.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 days agoeficonfig: add vertical scroll support
Masahisa Kojima [Tue, 24 Jan 2023 06:56:15 +0000 (15:56 +0900)] 
eficonfig: add vertical scroll support

The current eficonfig menu does not support vertical scroll,
so it can not display the menu entries greater than
the console row size.

This commit add the vertial scroll support.
The console size is retrieved by
SIMPLE_TEXT_OUTPUT_PROTOCOL.QueryMode() service, then
calculates the row size for menu entry by subtracting
menu header and description row size from the console row size.
"start" and "end" are added in the efimenu structure.
"start" keeps the menu entry index at the top, "end" keeps
the bottom menu entry index. item_data_print() menu function
only draws the menu entry between "start" and "end".

This commit also fixes the issue that "Save" and "Quit"
entries can be moved by BKEY_PLUS in change boot order menu.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 days agoeficonfig: refactor change boot order implementation
Masahisa Kojima [Tue, 24 Jan 2023 06:56:14 +0000 (15:56 +0900)] 
eficonfig: refactor change boot order implementation

This commit removes the change boot order specific
menu implementation. The change boot order implementation
calls eficonfig_process_common() same as other menus.

The change boot order menu requires own item_data_print
and item_choice implementation, but display_statusline
function can be a same function as other menus.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 days agoeficonfig: refactor eficonfig_process_common function
Masahisa Kojima [Tue, 24 Jan 2023 06:56:13 +0000 (15:56 +0900)] 
eficonfig: refactor eficonfig_process_common function

Current change boot order implementation does not call
eficonfig_process_common() and call own menu functions
for display_statusline, item_data_print and item_choice.
Change boot order functionality should call
eficonfig_process_common() to improve maintenanceability.

This commit is a preparation to remove the change boot
order specific implementation. The menu functions
(display_statusline, item_data_print and item_choice) are
added as argument of eficonfig_process_common().
The menu description string displayed at the bottom of
the menu is also added as argument.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 days agoefi_loader: fix comment in ESRT code
Heinrich Schuchardt [Mon, 23 Jan 2023 23:25:23 +0000 (00:25 +0100)] 
efi_loader: fix comment in ESRT code

There is no variable num_pages in function efi_esrt_allocate_install().

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 days agoREADME: remove 'U-Boot Porting Guide' section
Heinrich Schuchardt [Wed, 25 Jan 2023 19:00:23 +0000 (20:00 +0100)] 
README: remove 'U-Boot Porting Guide' section

This section does not match the standards of our documentation.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
4 days agodoc: move directory hierarchy to HTML
Heinrich Schuchardt [Wed, 25 Jan 2023 18:15:02 +0000 (19:15 +0100)] 
doc: move directory hierarchy to HTML

Move section 'Directory hierarchy' from file README to the HTML
documentation.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 days agoREADME: remove section 'Versioning'
Heinrich Schuchardt [Wed, 25 Jan 2023 18:15:01 +0000 (19:15 +0100)] 
README: remove section 'Versioning'

The information is already maintained in doc/develop/release_cycle.rst.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 days agodoc: move 'Reproducible builds'
Heinrich Schuchardt [Wed, 25 Jan 2023 18:15:00 +0000 (19:15 +0100)] 
doc: move 'Reproducible builds'

Move the README section to the HTML documentation.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 days agoREADME: replace references to CHANGELOG
Heinrich Schuchardt [Wed, 25 Jan 2023 18:14:59 +0000 (19:14 +0100)] 
README: replace references to CHANGELOG

Board configurations are in configs/ and not in the Makefile.

git log is the adequate way to identify who contributed to our source.
scripts/get_maintainer.pl is the correct way to identify maintainers.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 days agoREADME: remove NetBSD section
Heinrich Schuchardt [Wed, 25 Jan 2023 18:14:58 +0000 (19:14 +0100)] 
README: remove NetBSD section

The information in this section is outdated.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 days agoREADME: rework contribution advices
Heinrich Schuchardt [Wed, 25 Jan 2023 18:14:57 +0000 (19:14 +0100)] 
README: rework contribution advices

Remove description of coding standards and patch submission process.
Link to the relevant HTML documentation instead.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 days agoREADME: correct path to sandbox.rst
Heinrich Schuchardt [Wed, 25 Jan 2023 18:14:56 +0000 (19:14 +0100)] 
README: correct path to sandbox.rst

sandbox.rst was moved.

Fixes: 2851cc94f301 ("dm: Add documentation for host command and implementation")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 days agodoc: man-page for mtest
Heinrich Schuchardt [Thu, 26 Jan 2023 18:40:35 +0000 (19:40 +0100)] 
doc: man-page for mtest

Provide a man-page for the mtest command.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
4 days agodoc: add rst references to distro documentation in stm32mp1 board
Patrick Delaunay [Tue, 24 Jan 2023 09:16:02 +0000 (10:16 +0100)] 
doc: add rst references to distro documentation in stm32mp1 board

Use internal rst reference with :doc: to have a link to distro.rst page
in the generated U-Boot documentation.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 days agodoc: rework doc/mkeficapsule.1
Heinrich Schuchardt [Sun, 22 Jan 2023 10:27:10 +0000 (11:27 +0100)] 
doc: rework doc/mkeficapsule.1

* Indicate the location of the directory for EFI capsules.
* Improve the readability.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
4 days agodoc: update font man-page
Heinrich Schuchardt [Sat, 21 Jan 2023 16:18:14 +0000 (17:18 +0100)] 
doc: update font man-page

* add return values
* move configuration to separate section to match other man-pages
* fix typo

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 days agospl: doc: use correct name in jump_to_image_optee() description
Ovidiu Panait [Sun, 22 Jan 2023 17:57:13 +0000 (19:57 +0200)] 
spl: doc: use correct name in jump_to_image_optee() description

The actual function being documented is jump_to_image_optee(), not
jump_to_image_linux().

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
4 days agodoc: sleep man-page
Heinrich Schuchardt [Sat, 21 Jan 2023 15:24:03 +0000 (16:24 +0100)] 
doc: sleep man-page

Provide a man-page for the sleep command.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 days agodoc: example heading should be h2
Heinrich Schuchardt [Sat, 21 Jan 2023 09:25:04 +0000 (10:25 +0100)] 
doc: example heading should be h2

The 'Example' heading should be on a lower level than 'bdinfo command'.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 days agoevent: Document dynamic event handlers
Simon Glass [Fri, 20 Jan 2023 21:46:05 +0000 (14:46 -0700)] 
event: Document dynamic event handlers

Add mention of this feature in the event documentation.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 days agodoc: sl-mx8mm: Add CROSS_COMPILE to U-Boot make call and improve comment
Frieder Schrempf [Thu, 19 Jan 2023 11:20:39 +0000 (12:20 +0100)] 
doc: sl-mx8mm: Add CROSS_COMPILE to U-Boot make call and improve comment

Add the CROSS_COMPILE flag as we assume we build in a cross environment.
Also improve the comment about copying the binary to SD card.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
4 days agodoc: sl-mx8mm: Add guide for copying the bootloader to SPI NOR
Frieder Schrempf [Thu, 19 Jan 2023 11:20:38 +0000 (12:20 +0100)] 
doc: sl-mx8mm: Add guide for copying the bootloader to SPI NOR

This adds a guide for copying the raw bootloader image on the SD card
to the SPI NOR using U-Boot itself.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
4 days agodoc: sl-mx8mm: Update references to latest DDR firmware 8.18
Frieder Schrempf [Thu, 19 Jan 2023 11:20:37 +0000 (12:20 +0100)] 
doc: sl-mx8mm: Update references to latest DDR firmware 8.18

Use the latest firmware available from NXP.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
4 days agodoc: sl-mx8mm: Update the NXP TF-A source reference
Frieder Schrempf [Thu, 19 Jan 2023 11:20:36 +0000 (12:20 +0100)] 
doc: sl-mx8mm: Update the NXP TF-A source reference

Use the latest version of the NXP TF-A code and add a note about
quirks with GCC 12.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Convert Note: to ..note::
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
4 days agodoc: sl-mx8mm: Add note about using cross toolchain
Frieder Schrempf [Thu, 19 Jan 2023 11:20:35 +0000 (12:20 +0100)] 
doc: sl-mx8mm: Add note about using cross toolchain

This clarifies the usage of a cross toolchain to build U-Boot
and TF-A.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
4 days agodoc: sl-mx8mm: Mention OSM 1.1 support
Frieder Schrempf [Thu, 19 Jan 2023 11:20:34 +0000 (12:20 +0100)] 
doc: sl-mx8mm: Mention OSM 1.1 support

The latest revision of the SoM is compliant to OSM 1.1.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
4 days agocmd: fix mtest on 64 bit systems
Heinrich Schuchardt [Thu, 26 Jan 2023 23:38:50 +0000 (00:38 +0100)] 
cmd: fix mtest on 64 bit systems

* Use 16 digits on 64 bit systems.
* Use 64 bit patterns on 64 bit systems.
* Expect the sign bit in bit 63 on 64 bit systems.
* Adjust the formatting of a constant.
* Always print result on new line

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Stefan Roese <sr@denx.de>
4 days agoMerge tag 'xilinx-for-v2023.04-rc1' of https://source.denx.de/u-boot/custodians/u... WIP/27Jan2023
Tom Rini [Fri, 27 Jan 2023 15:15:39 +0000 (10:15 -0500)] 
Merge tag 'xilinx-for-v2023.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx chnages for v2023.04-rc1

makefile:
- Add multi_dtb_fit dependency

clk:
- Handle error cases

microblaze:
- Disable falcon mode and cleanup code around

xilinx:
- Enable regular expression matching in board_fit_config_name_match()
- Fix FRU handling for 0xC1 format
- Fix Xilinx legacy format eeprom parsing

zynqmp:
- Some DT updates/cleanups
- Fix IDcode for xck24
- Remove empty mini config files
- Add support for k24

versal:
- Remove empty mini config files

versal_net:
- Setup timer when runs in EL3
- Build u-boot.elf for mini configurations

zynq-gem:
- Add support for new compatible strings
- Remove support for Avnet Ultrazedev SOM
- Handle SGMII with PCS phy

spi:
- Add support for gigadevice parts

misc:
- Remove CONFIG_TARGET_VENUS ifdef
- Add missing headers to remove sparse warnings

4 days agofru: ops: Display FRU fields properly for 0xc1 fields
Algapally Santosh Sagar [Wed, 25 Jan 2023 12:06:21 +0000 (13:06 +0100)] 
fru: ops: Display FRU fields properly for 0xc1 fields

FRU data is not displayed properly in case of 0xc1 fields.
The 0xC1 can be used in two cases.
1. Char record type 8-bit ASCII + Latin 1 with length of 1.
(For example board revision 'A')

2. C1h (type/length byte encoded to indicate no more info fields).
which can follow by 00h to fill all remaining unused space

Hence removed the check end-of-the field c1 to allow c1 fields.

"ASCII+LATIN1" is defined as the printable characters from the
first set of 256 characters of Unicode 6.2 (U+0000h through U+00FFh,
inclusive) expressed as an eight-bit value. (Unicode follows ISO/IEC
8859-1 in the layout of printable characters up to U+00FFh).

So, print only printable chars and limit range from 0x20 ' ' to 0x7e '-'
which will be also indication if 0xc1 behaves as record with one char or
end of record.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4198d73de600627872c80a5b07e5068502c589d7.1674648379.git.michal.simek@amd.com
4 days agoxilinx: board: Update logic in xilinx_read_eeprom_legacy
Michal Simek [Tue, 24 Jan 2023 15:19:28 +0000 (16:19 +0100)] 
xilinx: board: Update logic in xilinx_read_eeprom_legacy

When eeprom has random content printing random chars can stuck U-Boot.
That's why update legacy eeprom format decoding algorithm to copy only
maximum amount of chars allocated for fields.
And also print them directly from desc structure.

Previous algorithm was printing strings first directly from eeprom content
and then copy them to desc structure.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/42065fcbb1a10581f9f4f091d64b43c01fe595c6.1674573561.git.michal.simek@amd.com
4 days agoxilinx: board: Fix xilinx_eeprom_legacy_cleanup()
Michal Simek [Tue, 24 Jan 2023 15:19:27 +0000 (16:19 +0100)] 
xilinx: board: Fix xilinx_eeprom_legacy_cleanup()

When ethernet mac address contains 0x20 or 0xff MAC address is changed and
bytes are converted to zeros. That's why fix decoding algorithm to ignore
fields where MAC address is stored and all non printable chars (including
space) are zeroed.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/2802cf1086b14c181356810006fe886f950a36f3.1674573561.git.michal.simek@amd.com
4 days agoxilinx: board: Use ETH_ALEN macro for mac address size
Michal Simek [Tue, 24 Jan 2023 15:19:26 +0000 (16:19 +0100)] 
xilinx: board: Use ETH_ALEN macro for mac address size

Use predefined macro for eth_mac legacy format.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/382d4bff370894164fad3c30ac0400b25142b544.1674573561.git.michal.simek@amd.com
4 days agonet: zynq_gem: Wait for SGMII PCS link in zynq_gem_init()
Stefan Roese [Wed, 25 Jan 2023 07:09:08 +0000 (08:09 +0100)] 
net: zynq_gem: Wait for SGMII PCS link in zynq_gem_init()

In our system using ZynqMP with an external SGMII PHY it's necessary
to wait for the PCS link and auto negotiation to finish before the xfer
starts. Otherwise the first packet(s) might get dropped, resulting in a
delay at the start of the ethernet transfers.

This is only done when the PHY link is already up, which is done in
phy_startup(). As waiting for the PHY link bits via pcsstatus does not
make much sense, when the link is not available in general (e.g. no
cable connected).

This patch adds the necessary code including a minimal delay of 1 ms
which fixes problems of dropped first packages.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Katakam Harini <harini.katakam@amd.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Sean Anderson <sean.anderson@seco.com>
Link: https://lore.kernel.org/r/20230125070908.1343256-1-sr@denx.de
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 days agodrivers: mmc: Change datatype of tuning_loop_counter to int
Algapally Santosh Sagar [Fri, 20 Jan 2023 05:36:17 +0000 (22:36 -0700)] 
drivers: mmc: Change datatype of tuning_loop_counter to int

tuning_loop_counter is of char type, which is not capable of handling
the entire data range of this variable. This is pointed by below sparse
warning. Change datatype to int to fix this.
warning: comparison is always false due to limited range of data type.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230120053617.32463-5-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 days agoxilinx: versal: Add missing header
Algapally Santosh Sagar [Fri, 20 Jan 2023 05:36:16 +0000 (22:36 -0700)] 
xilinx: versal: Add missing header

Add missing prototype to fix the sparse warning, warning: no
previous prototype for 'do_go_exec' [-Wmissing-prototypes].

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230120053617.32463-4-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 days agogpio: zynqmp: Handle error from get_gpio_modepin
Algapally Santosh Sagar [Fri, 20 Jan 2023 05:36:15 +0000 (22:36 -0700)] 
gpio: zynqmp: Handle error from get_gpio_modepin

There is a unused variable ret, due to which we are getting sparse warning
as below.
warning: variable 'ret' set but not used [-Wunused-but-set-variable].

Return ret incase of error.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230120053617.32463-3-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 days agoxilinx: common: Include header file to fix warning
Algapally Santosh Sagar [Fri, 20 Jan 2023 05:36:14 +0000 (22:36 -0700)] 
xilinx: common: Include header file to fix warning

Prototype is missing for board_get_usable_ram_top, which is pointed by
below sparse warning. Include init.h header file to fix this.

warning: no previous prototype for 'board_get_usable_ram_top'
[-Wmissing-prototypes].

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230120053617.32463-2-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 days agoarm64: versal-net: Enable remaking ELF from bin
Michal Simek [Thu, 19 Jan 2023 09:46:59 +0000 (10:46 +0100)] 
arm64: versal-net: Enable remaking ELF from bin

U-Boot is composing u-boot.bin from u-boot-nodtb.bin with appended
dts/dt.dtb. It means U-Boot doesn't have DTB inside. When REMAKE_ELF is
enabled make will also create u-boot.elf which is recreated from
u-boot.bin. Below is build output for mini configuration how ELF is
recreated.

cat arch/arm/dts/versal-net-mini.dtb > dts/dt.dtb
cat u-boot-nodtb.bin dts/dt.dtb > u-boot-dtb.bin
cp dts/dt.dtb u-boot.dtb
cp u-boot-dtb.bin u-boot.bin
aarch64-linux-gnu-objcopy -I binary -B aarch64 -O elf64-littleaarch64
 u-boot.bin u-boot-elf.o
aarch64-linux-gnu-ld.bfd u-boot-elf.o -o u-boot.elf -EL -T u-boot-elf.lds
 --defsym="_start"=0xBBF00000 -Ttext=0xBBF00000

It is useful to have u-boot.elf present because Xilinx XSDB debugger can
load ELF file and user doesn't need to specify loading address for
u-boot.bin.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ca550c5c4bf908e757a49a83fdfab0e7100de45e.1674121617.git.michal.simek@amd.com
4 days agomicroblaze: spl: disable falcon mode by default
Ovidiu Panait [Wed, 25 Jan 2023 16:41:57 +0000 (18:41 +0200)] 
microblaze: spl: disable falcon mode by default

Drop falcon mode configs from microblaze-generic_defconfig, so that a
defconfig build will still boot into u-boot proper.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20230125164157.1638680-3-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 days agomicroblaze: spl: drop boot_linux
Ovidiu Panait [Wed, 25 Jan 2023 16:41:56 +0000 (18:41 +0200)] 
microblaze: spl: drop boot_linux

Drop boot_linux variable as it is not assigned anywhere. Now that there is
no variable controlling linux boot in spl_start_uboot(), make this
function always return false when falcon mode is enabled.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20230125164157.1638680-2-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 days agomicroblaze: spl: wrap spl_start_uboot() in SPL_OS_BOOT ifdefs
Ovidiu Panait [Wed, 25 Jan 2023 16:41:55 +0000 (18:41 +0200)] 
microblaze: spl: wrap spl_start_uboot() in SPL_OS_BOOT ifdefs

Make spl_start_uboot() available only if CONFIG_SPL_OS_BOOT is enabled,
since it is only used for falcon mode.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20230125164157.1638680-1-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 days agoMerge tag 'dm-pull-26jan23' of https://source.denx.de/u-boot/custodians/u-boot-dm WIP/26Jan2023
Tom Rini [Fri, 27 Jan 2023 02:57:38 +0000 (21:57 -0500)] 
Merge tag 'dm-pull-26jan23' of https://source.denx.de/u-boot/custodians/u-boot-dm

FIT improvements with split-elf, especially for Rockchip
Binman positioning by ELF symbol

5 days agoMerge https://source.denx.de/u-boot/custodians/u-boot-spi
Tom Rini [Thu, 26 Jan 2023 18:07:06 +0000 (13:07 -0500)] 
Merge https://source.denx.de/u-boot/custodians/u-boot-spi

- fix return code of sf command (Heinrich)
- fix register reads in STIG Mode (Dhruva)
- Infineon s25fs256t support (Takahiro)

5 days agobinman: Fix a test-coverage regression
Simon Glass [Mon, 23 Jan 2023 18:29:41 +0000 (11:29 -0700)] 
binman: Fix a test-coverage regression

Unfortunately a recent patch snuck through without the require test
coverage. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 571bc4e67d3 ("binman: Support positioning an entry by and ELF symbol")

5 days agodm: core: Use full printf() format when possible
Samuel Holland [Sat, 21 Jan 2023 23:30:12 +0000 (17:30 -0600)] 
dm: core: Use full printf() format when possible

Use a more accurate check for determining if the full format string will
be handled correctly, since SPL_USE_TINY_PRINTF can be disabled.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 days agobinman: Add 'min-size' entry property
Samuel Holland [Sat, 21 Jan 2023 23:25:16 +0000 (17:25 -0600)] 
binman: Add 'min-size' entry property

This property sets the minimum size of an entry, including padding but
not alignment. It can be used to reserve space for growth of an entry,
or to enforce a minimum offset for later entries in the section.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 days agorockchip: Use atf as firmware and move u-boot to loadables in FIT
Jonas Karlman [Sat, 21 Jan 2023 19:02:26 +0000 (19:02 +0000)] 
rockchip: Use atf as firmware and move u-boot to loadables in FIT

The FIT generated after the switch to using binman is using different
values for firmware and loadables properties compared to the old script.

With the old script:
 firmware = "atf-1";
 loadables = "u-boot", "atf-2", ...;

After switch to binman:
 firmware = "u-boot";
 loadables = "atf-1", "atf-2", ...;

This change result in SPL jumping directly into U-Boot proper instead of
initializing TF-A.

With this patch the properties change back to:
 firmware = "atf-1";
 loatables = "u-boot", "atf-2", ...;

Fixes: e0c0efff2a02 ("rockchip: Support building the all output files in binman")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 days agobinman: Add support for selecting firmware to use with split-elf
Jonas Karlman [Sat, 21 Jan 2023 19:02:12 +0000 (19:02 +0000)] 
binman: Add support for selecting firmware to use with split-elf

In some cases it is desired for SPL to start TF-A instead of U-Boot
proper. Add support for a new property fit,firmware that picks a
valid entry and prepends the remaining valid entries to the
loadables list generated by the split-elf generator.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 days agorockchip: Add sha256 hash to FIT images
Jonas Karlman [Sat, 21 Jan 2023 19:01:59 +0000 (19:01 +0000)] 
rockchip: Add sha256 hash to FIT images

Add sha256 hash to FIT images when CONFIG_SPL_FIT_SIGNATURE=y.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 days agobinman: Add special subnodes to the nodes generated by split-elf
Jonas Karlman [Sat, 21 Jan 2023 19:01:48 +0000 (19:01 +0000)] 
binman: Add special subnodes to the nodes generated by split-elf

Special nodes, hash and signature, is not being added to the nodes
generated for each segment in split-elf operation.

Copy the subnode logic used in _gen_fdt_nodes to _gen_split_elf to
ensure special nodes are added to the generated nodes.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 days agorockchip: Align FIT image data to SD/MMC block length
Jonas Karlman [Sat, 21 Jan 2023 19:01:39 +0000 (19:01 +0000)] 
rockchip: Align FIT image data to SD/MMC block length

SPL load FIT images by reading the data aligned to block length.
Block length aligned image data is read directly to the load address.
Unaligned image data is written to an offset of the load address and
then the data is memcpy to the load address.

This adds a small overhead of having to memcpy unaligned data, something
that normally is not an issue.

However, TF-A may have a segment that should be loaded into SRAM, e.g.
vendor TF-A for RK3568 has a 8KiB segment that should be loaded into the
8KiB PMU SRAM. Having the image data for such segment unaligned result
in segment being written to and memcpy from beyond the SRAM boundary, in
the end this results in invalid data in SRAM.

Aligning the FIT and its external data to MMC block length to work
around such issue.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 days agobinman: Add support for align argument to mkimage tool
Jonas Karlman [Sat, 21 Jan 2023 19:01:39 +0000 (19:01 +0000)] 
binman: Add support for align argument to mkimage tool

Add support to indicate what alignment to use for the FIT and its
external data. Pass the alignment to mkimage via the -B flag.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 days agomtd: spi-nor: Add support for Infineon s25fs256t
Takahiro Kuwano [Mon, 19 Dec 2022 01:28:21 +0000 (10:28 +0900)] 
mtd: spi-nor: Add support for Infineon s25fs256t

Infineon S25FS256T is 256Mbit Quad SPI NOR flash. The key features and
differences comparing to other Spansion/Cypress flash familes are:
  - 4-byte address mode by factory default
  - Quad mode is enabled by factory default
  - Supports mixture of 128KB and 64KB sectors by OTP configuration
    (this patch supports uniform 128KB only)

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 days agomtd: spi-nor: Rename s25hx_t prefix
Takahiro Kuwano [Mon, 19 Dec 2022 01:28:20 +0000 (10:28 +0900)] 
mtd: spi-nor: Rename s25hx_t prefix

Rename s25hx_t prefix to s25 so that the single set of fixup hooks can
support all other S25 families.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Acked-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 days agocmd: fix return code of 'sf erase'
Heinrich Schuchardt [Mon, 2 Jan 2023 17:21:16 +0000 (18:21 +0100)] 
cmd: fix return code of 'sf erase'

If the offset or the size passed to the 'sf erase' command exceeds
the size of the SPI flash displaying the command usage is not
helpful. Return CMD_RET_FAILURE instead of CMD_RET_USAGE.

Use the CMD_RET_* constants instead of 0, 1, -1.

Simplify a logical expression in the final return statement.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 days agocmd: simplify do_spi_flash()
Heinrich Schuchardt [Mon, 2 Jan 2023 17:21:15 +0000 (18:21 +0100)] 
cmd: simplify do_spi_flash()

CMD_RET_USAGE == -1. The special handling of this value at the end of
do_spi_flash() does not make any sense.

To avoid future confusion use the CMD_RET_* constants and simplify the
code.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 days agocmd: fix return code of 'sf write' and 'sf read'
Heinrich Schuchardt [Mon, 2 Jan 2023 17:21:14 +0000 (18:21 +0100)] 
cmd: fix return code of 'sf write' and 'sf read'

If the offset or the size passed to the 'sf write' or 'sf read' command
exceeds the size of the SPI flash displaying the command usage is not
helpful. Return CMD_RET_FAILURE instead of CMD_RET_USAGE.

Use the CMD_RET_* constants instead of 0, 1, -1.

Simplify a logical expression in the final return statement.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 days agospi: cadence_qspi: use STIG mode for small reads
Dhruva Gole [Tue, 3 Jan 2023 06:31:12 +0000 (12:01 +0530)] 
spi: cadence_qspi: use STIG mode for small reads

Fix the issue where some flash chips like cypress S25HS256T return the
value of the same register over and over in DAC mode.

For example in the TI K3-AM62x Processors refer [0] Technical Reference
Manual there is a layer of digital logic in front of the QSPI/OSPI
Drive when used in DAC mode. This is part of the Flash Subsystem (FSS)
which provides access to external Flash devices.

The FSS0_0_SYSCONFIG Register (Offset = 4h) has a BIT Field for
OSPI_32B_DISABLE_MODE which has a Reset value = 0. This means, OSPI 32bit
mode enabled by default.

Thus, by default controller operates in 32 bit mode causing it to always
align all data to 4 bytes from a 4byte aligned address. In some flash
chips like cypress for example if we try to read some regs in DAC mode
then it keeps sending the value of the first register that was requested
and inorder to read the next reg, we have to stop and re-initiate a new
transaction.

This causes wrong register values to be read than what is desired when
registers are read in DAC mode. Hence if the data.nbytes is very less
then prefer STIG mode for such small reads.

[0] https://www.ti.com/lit/ug/spruiv7a/spruiv7a.pdf

Tested-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
[jagan: add tab space for comments]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 days agospi: cadence_qspi: setup ADDR Bits in cmd reads
Dhruva Gole [Tue, 3 Jan 2023 06:31:11 +0000 (12:01 +0530)] 
spi: cadence_qspi: setup ADDR Bits in cmd reads

Setup the Addr bit field while issuing register reads in STIG mode. This
is needed for example flashes like cypress define in their transaction
table that to read any register there is 1 cmd byte and a few more address
bytes trailing the cmd byte. Absence of addr bytes will obviously fail
to read correct data from flash register that maybe requested by flash
driver because the controller doesn't even specify which address of the
flash register the read is being requested from.

Signed-off-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 days agomtd: spi-nor-core: Make CFRx reg fields generic
Takahiro Kuwano [Fri, 20 Jan 2023 03:28:22 +0000 (12:28 +0900)] 
mtd: spi-nor-core: Make CFRx reg fields generic

Cypress defines two flavors of configuration registers, volatile and
non volatile, and both use the same bit fields. Rename the bitfields in
the configuration registers so that they can be used for both flavors.

Suggested-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 days agomtd: spi-nor-core: Consider reserved bits in CFR5 register
Takahiro Kuwano [Fri, 20 Jan 2023 03:28:21 +0000 (12:28 +0900)] 
mtd: spi-nor-core: Consider reserved bits in CFR5 register

CFR5[6] is reserved bit and must be always 1. Set it to comply with flash
requirements. While fixing SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_EN definition,
stop using magic numbers and describe the missing bit fields in CFR5
register. This is useful for both readability and future possible addition
of Octal STR mode support.

Fixes: ea9a22f7e79c ("mtd: spi-nor-core: Add support for Cypress Semper flash")
Suggested-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>